Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Add PicoSoC IceBreaker demo | Clifford Wolf | 2018-08-18 | 1 | -4/+10 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Expose ENABLE_IRQ_QREGS and PROGADDR_IRQ from picosoc.v | Olof Kindgren | 2018-08-16 | 1 | -2/+4 |
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* | Bypass picosoc compile order check if PICORV32_REGS is defined. | Olof Kindgren | 2018-05-18 | 1 | -0/+2 |
| | | | | | | | | | | | | | Previously, picosoc.v needed to be sourced before picorv32.v to ensure that the PICORV32_REGS `define (used to select implementation for the register file) was set to picosoc_regs This allows for overriding PICORV32_REGS, e.g. by setting it externally in the EDA tool invocation. In this case, the compile order between picorv32.v and picosoc.v is not important. Note: This change will break the safety check if PICORV32_REGS is defined between sourcing picorv32.v and picosoc.v | ||||
* | Add PICORV32_REGS mechanism for ASIC sram instantiation | Clifford Wolf | 2017-10-01 | 1 | -11/+56 |
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* | Enable a bunch of PicoRV32 features in PicoSoC | Clifford Wolf | 2017-09-22 | 1 | -2/+27 |
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* | Improve PicoSoC demo firmware | Clifford Wolf | 2017-09-18 | 1 | -3/+3 |
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* | Update picosoc memory map | Clifford Wolf | 2017-09-15 | 1 | -4/+4 |
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* | Add simple UART to PicoSoC | Clifford Wolf | 2017-08-11 | 1 | -2/+33 |
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* | Add support for QSPI DDR mode, Add SPI MEMIO config reg | Clifford Wolf | 2017-08-11 | 1 | -3/+11 |
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* | Refactor picosoc flash_io interfaces | Clifford Wolf | 2017-08-07 | 1 | -23/+24 |
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* | Refactor picosoc code | Clifford Wolf | 2017-08-07 | 1 | -43/+61 |
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* | Rename "spiflash" example to "picosoc" | Clifford Wolf | 2017-08-07 | 1 | -0/+111 |