diff options
author | ckeller <ckeller@users.noreply.github.com> | 2022-02-15 18:27:33 +0100 |
---|---|---|
committer | GitHub <noreply@github.com> | 2022-02-15 18:27:33 +0100 |
commit | c163813243e1b38b7d8c10b49d78a728d747e0e5 (patch) | |
tree | 7d2d936fc170ad9215aaac2822aa896957456f71 /src/bva | |
parent | 1860a878ad5af74f5e2d2142c35b1e2d7c43aad3 (diff) | |
download | smtcoq-c163813243e1b38b7d8c10b49d78a728d747e0e5.tar.gz smtcoq-c163813243e1b38b7d8c10b49d78a728d747e0e5.zip |
Use the Register mechanism (#104)
Diffstat (limited to 'src/bva')
-rw-r--r-- | src/bva/BVList.v | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/src/bva/BVList.v b/src/bva/BVList.v index f0ba8ef..d8632bb 100644 --- a/src/bva/BVList.v +++ b/src/bva/BVList.v @@ -2541,6 +2541,29 @@ Module BITVECTOR_LIST <: BITVECTOR. End BITVECTOR_LIST. + +(* Register constants for OCaml access *) +Register BITVECTOR_LIST.bitvector as SMTCoq.bva.BVList.BITVECTOR_LIST.bitvector. +Register BITVECTOR_LIST.of_bits as SMTCoq.bva.BVList.BITVECTOR_LIST.of_bits. +Register BITVECTOR_LIST.bitOf as SMTCoq.bva.BVList.BITVECTOR_LIST.bitOf. +Register BITVECTOR_LIST.bv_eq as SMTCoq.bva.BVList.BITVECTOR_LIST.bv_eq. +Register BITVECTOR_LIST.bv_not as SMTCoq.bva.BVList.BITVECTOR_LIST.bv_not. +Register BITVECTOR_LIST.bv_neg as SMTCoq.bva.BVList.BITVECTOR_LIST.bv_neg. +Register BITVECTOR_LIST.bv_and as SMTCoq.bva.BVList.BITVECTOR_LIST.bv_and. +Register BITVECTOR_LIST.bv_or as SMTCoq.bva.BVList.BITVECTOR_LIST.bv_or. +Register BITVECTOR_LIST.bv_xor as SMTCoq.bva.BVList.BITVECTOR_LIST.bv_xor. +Register BITVECTOR_LIST.bv_add as SMTCoq.bva.BVList.BITVECTOR_LIST.bv_add. +Register BITVECTOR_LIST.bv_mult as SMTCoq.bva.BVList.BITVECTOR_LIST.bv_mult. +Register BITVECTOR_LIST.bv_ult as SMTCoq.bva.BVList.BITVECTOR_LIST.bv_ult. +Register BITVECTOR_LIST.bv_slt as SMTCoq.bva.BVList.BITVECTOR_LIST.bv_slt. +Register BITVECTOR_LIST.bv_concat as SMTCoq.bva.BVList.BITVECTOR_LIST.bv_concat. +Register BITVECTOR_LIST.bv_extr as SMTCoq.bva.BVList.BITVECTOR_LIST.bv_extr. +Register BITVECTOR_LIST.bv_zextn as SMTCoq.bva.BVList.BITVECTOR_LIST.bv_zextn. +Register BITVECTOR_LIST.bv_sextn as SMTCoq.bva.BVList.BITVECTOR_LIST.bv_sextn. +Register BITVECTOR_LIST.bv_shl as SMTCoq.bva.BVList.BITVECTOR_LIST.bv_shl. +Register BITVECTOR_LIST.bv_shr as SMTCoq.bva.BVList.BITVECTOR_LIST.bv_shr. + + (* Local Variables: coq-load-path: ((rec ".." "SMTCoq")) |