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author | n.ramanathan14 <n.ramanathan14@imperial.ac.uk> | 2020-09-15 08:40:52 +0000 |
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committer | overleaf <overleaf@localhost> | 2020-09-15 08:40:55 +0000 |
commit | ebaf38ee9fa9ed6a74230c93fa2d15df44521c9a (patch) | |
tree | 9b661c26ec60e0710668e108e879abbfd1ecb3bd /conference.bib | |
parent | 66b5b9ca3de555980d93864fb7bac5e8ea0fcb1c (diff) | |
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diff --git a/conference.bib b/conference.bib index c8d683e..3e766f8 100644 --- a/conference.bib +++ b/conference.bib @@ -216,4 +216,23 @@ with {LegUp} High-Level Synthesis}, timestamp = {Thu, 16 Apr 2020 13:51:46 +0200}, biburl = {https://dblp.org/rec/journals/pacmpl/MarcozziTDC19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} +} + +@inproceedings{ramanathan+17, + author = {Nadesh Ramanathan and + Shane T. Fleming and + John Wickerson and + George A. Constantinides}, + editor = {Jonathan W. Greene and + Jason Helge Anderson}, + title = {Hardware Synthesis of Weakly Consistent {C} Concurrency}, + booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable + Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017}, + pages = {169--178}, + publisher = {{ACM}}, + year = {2017}, + url = {http://dl.acm.org/citation.cfm?id=3021733}, + timestamp = {Tue, 06 Nov 2018 16:58:22 +0100}, + biburl = {https://dblp.org/rec/conf/fpga/RamanathanFWC17.bib}, + bibsource = {dblp computer science bibliography, https://dblp.org} }
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