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+\begin{example}[A miscompilation bug in LegUp]
+
+The test-case in Figure~\ref{fig:eval:legup:wrong} produces an incorrect Verilog in LegUp 4.0 and 7.5, which means that the results of RTL simulation is different to the C execution.
+
+\begin{figure}
+\begin{minted}{c}
+volatile int a = 0;
+int b = 1;
+
+int main() { 
+  int d = 1;
+  if (d + a) 
+    b || 1;
+  else 
+    b = 0;
+  return b;
+}
+\end{minted}
+\caption{An output mismatch: LegUp HLS returns 0 but the correct result is 1.}\label{fig:eval:legup:wrong}
+\end{figure}
+
+In the code above, \texttt{b} has value 1 when run in GCC, but has value 0 when run with LegUp.  If the \texttt{volatile} keyword is removed from \texttt{a}, then the Verilog produces the correct result. As \texttt{a} and \texttt{d} are constants, the \code{if} statement should always produce go into the \texttt{true} branch, meaning \texttt{b} should never be set to 0.  The \texttt{true} branch of the \code{if} statement only executes an expression which is not assigned to any variable, meaning the initial state of all variables should not change. However, LegUp HLS generates a design which enters the \texttt{else} branch instead and assigns \texttt{b} to be 0.  The cause of this bug seems to be the use of  \texttt{volatile} keyword, which interferes with the analysis that attempts to simplify the \code{if} statement.
+
+\end{example}
+\ No newline at end of file