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@article{canis13_legup,
  author          = {Canis, Andrew and Choi, Jongsok and Aldham, Mark and Zhang, Victor and
                  Kammoona, Ahmed and Czajkowski, Tomasz and Brown, Stephen D. and Anderson, Jason
                  H.},
  title           = {Legup: an Open-Source High-Level Synthesis Tool for Fpga-Based
                  Processor/accelerator Systems},
  journal         = {ACM Trans. Embed. Comput. Syst.},
  volume          = {13},
  number          = {2},
  year            = {2013},
  doi             = {10.1145/2514740},
  address         = {New York, NY, USA},
  articleno       = {24},
  issn            = {1539-9087},
  issue_date      = {September 2013},
  month           = {9},
  numpages        = {27},
  publisher       = {Association for Computing Machinery},
}

@misc{xilinx20_vivad_high_synth,
  author          = {Xilinx},
  title           = {Vivado High-level Synthesis},
  url             = {https://bit.ly/39ereMx},
  urldate         = {2020-07-20},
  year            = 2020,
}

@misc{intel20_sdk_openc_applic,
  author          = {Intel},
  title           = {{SDK} for {OpenCL} Applications},
  url             = {https://intel.ly/30sYHz0},
  urldate         = {2020-07-20},
  year            = 2020,
}

@misc{mentor20_catap_high_level_synth,
  author          = {Mentor},
  title           = {Catapult High-Level Synthesis},
  url             = {https://bit.ly/32xhADw},
  urldate         = {2020-06-06},
  year            = 2020,
}

@inproceedings{yang11_findin_under_bugs_c_compil,
  author =       {Yang, Xuejun and Chen, Yang and Eide, Eric and Regehr, John},
  title =        {Finding and Understanding Bugs in C Compilers},
  booktitle =    {Proceedings of the 32nd ACM SIGPLAN Conference on Programming
                  Language Design and Implementation},
  year =         2011,
  pages =        {283--294},
  doi =          {10.1145/1993498.1993532},
  acmid =        1993532,
  address =      {New York, NY, USA},
  isbn =         {978-1-4503-0663-8},
  location =     {San Jose, California, USA},
  numpages =     12,
  publisher =    {ACM},
  series =       {PLDI '11},
}

@inproceedings{lidbury15_many_core_compil_fuzzin,
  author          = {Lidbury, Christopher and Lascu, Andrei and Chong, Nathan and Donaldson,
                  Alastair F.},
  title           = {Many-Core Compiler Fuzzing},
  booktitle       = {Proceedings of the 36th ACM SIGPLAN Conference on Programming Language Design
                  and Implementation},
  year            = 2015,
  pages           = {65-76},
  doi             = {10.1145/2737924.2737986},
  address         = {New York, NY, USA},
  isbn            = 9781450334686,
  location        = {Portland, OR, USA},
  numpages        = 12,
  publisher       = {Association for Computing Machinery},
  series          = {PLDI '15},
}

@misc{hls_fintech,
  author = {EE Journal},
  title = {Silexica Expands Into FinTech Industry Bringing Next-Generation Compute Acceleration},
  year = {2020},
  month = {June},
  url = {https://bit.ly/hls-fintech},
  howpublished = {Press Release},
}

@misc{hls_objdetect,
  author = {PR Newswire},
  title = {Mentor's Catapult HLS enables Chips\&Media to deliver deep learning hardware accelerator IP in half the time},
  year = {2019},
  month = {January},
  url = {https://bit.ly/hls-objdetect},
  howpublished = {Press Release},
}

@misc{hls_controller,
  author = {LegUp Computing},
  title = {Migrating Motor Controller {C++} Software
from a Microcontroller to a PolarFire {FPGA}
with {LegUp} High-Level Synthesis},
  year = {2020},
  month = {June},
  url = {https://bit.ly/hls-controller},
  howpublished = {White Paper},
}

@inproceedings {verismith,
  author = {Yann Herklotz and
               John Wickerson},
  title = {Finding and Understanding Bugs in {FPGA} Synthesis Tools},
  booktitle = {{FPGA}},
  pages = {277-287},
  doi = {10.1145/3373087.3375310},
  publisher = {{ACM}},
  year = {2020}
}

@inproceedings{creduce,
  title={Test-case reduction for {C} compiler bugs},
  author={Regehr, John and Chen, Yang and Cuoq, Pascal and Eide, Eric and Ellison, Chucky and Yang, Xuejun},
  booktitle={Proceedings of the 33rd ACM SIGPLAN conference on Programming Language Design and Implementation},
  pages={335--346},
  year={2012}
}

@inproceedings{fuzzing+chen+13+taming,
  title={Taming compiler fuzzers},
  author={Chen, Yang and Groce, Alex and Zhang, Chaoqiang and Wong, Weng-Keen and Fern, Xiaoli and Eide, Eric and Regehr, John},
  booktitle={Proceedings of the 34th ACM SIGPLAN conference on Programming language design and implementation},
  pages={197--208},
  year={2013}
}

@article{fuzzing+liang+18+survey,
  title={Fuzzing: State of the art},
  author={Liang, Hongliang and Pei, Xiaoxiao and Jia, Xiaodong and Shen, Wuwei and Zhang, Jian},
  journal={IEEE Transactions on Reliability},
  volume={67},
  number={3},
  pages={1199--1218},
  year={2018},
  publisher={IEEE}
}

@inproceedings{fuzz+sun+16+toward,
  title={Toward understanding compiler bugs in {GCC and LLVM}},
  author={Sun, Chengnian and Le, Vu and Zhang, Qirun and Su, Zhendong},
  booktitle={Proceedings of the 25th International Symposium on Software Testing and Analysis},
  pages={294--305},
  year={2016}
}

@inproceedings{fuzzing+zhang+19,
  title={Finding and understanding bugs in software model checkers},
  author={Zhang, Chengyu and Su, Ting and Yan, Yichen and Zhang, Fuyuan and Pu, Geguang and Su, Zhendong},
  booktitle={Proceedings of the 2019 27th ACM Joint Meeting on European Software Engineering Conference and Symposium on the Foundations of Software Engineering},
  pages={763--773},
  year={2019}
}

@article{perna12_mechan_wire_wise_verif_handel_c_synth,
  author = "Juan Perna and Jim Woodcock",
  title = {Mechanised Wire-Wise Verification of {Handel-C} Synthesis},
  journal = "Science of Computer Programming",
  volume = 77,
  number = 4,
  pages = "424 - 443",
  year = 2012,
  doi = "10.1016/j.scico.2010.02.007",
  issn = "0167-6423",
}

@article{chouksey20_verif_sched_condit_behav_high_level_synth,
  author          = {R. {Chouksey} and C. {Karfa}},
  title           = {Verification of Scheduling of Conditional Behaviors in
                  High-Level Synthesis},
  journal         = {IEEE Transactions on Very Large Scale Integration (VLSI)
                  Systems},
  volume          = {},
  number          = {},
  pages           = {1-14},
  year            = {2020},
  doi             = {10.1109/TVLSI.2020.2978242},
  url             = {https://doi.org/10.1109/TVLSI.2020.2978242},
  ISSN            = {1557-9999},
  month           = {},
}

@inproceedings{gupta03_spark,
  author          = {S. {Gupta} and N. {Dutt} and R. {Gupta} and A. {Nicolau}},
  title           = {{SPARK}: a high-level synthesis framework for applying parallelizing compiler
                  transformations},
  booktitle       = {16th International Conference on VLSI Design, 2003. Proceedings.},
  year            = 2003,
  pages           = {461-466},
  doi             = {10.1109/ICVD.2003.1183177},
  url             = {https://doi.org/10.1109/ICVD.2003.1183177},
  ISSN            = {1063-9667},
  month           = {Jan},
}