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-rw-r--r--main.tex4
-rw-r--r--references.bib16
2 files changed, 19 insertions, 1 deletions
diff --git a/main.tex b/main.tex
index 4e54c14..e762df2 100644
--- a/main.tex
+++ b/main.tex
@@ -214,7 +214,9 @@ However, \citet{du21_fuzzin_high_level_synth_tools}, for example, show that on a
\subsection{Will the generated designs be fast enough?}
-Another concern might be that a verified HLS tool might not be performant enough to be usable in practice. If that is the case, then the verification effort could be seen as useless
+Another concern might be that a verified HLS tool might not be performant enough to be usable in practice. If that is the case, then the verification effort could be seen as useless, as it could not be used.
+
+First of all, performing comparisons between the fully verified bits of \vericert{} and \legup{}~\cite{canis11_legup}
\subsection{A Verified tool can still be flaky and fail}
diff --git a/references.bib b/references.bib
index b66f288..b05f07f 100644
--- a/references.bib
+++ b/references.bib
@@ -228,3 +228,19 @@
publisher = {IEEE Press},
series = {FormaliSE '19}
}
+
+@inproceedings{canis11_legup,
+ author = {Canis, Andrew and Choi, Jongsok and Aldham, Mark and Zhang, Victor and Kammoona, Ahmed and Anderson, Jason H. and Brown, Stephen and Czajkowski, Tomasz},
+ title = {LegUp: High-Level Synthesis for FPGA-Based Processor/Accelerator Systems},
+ year = {2011},
+ isbn = {9781450305549},
+ publisher = {Association for Computing Machinery},
+ address = {New York, NY, USA},
+ url = {https://doi.org/10.1145/1950413.1950423},
+ doi = {10.1145/1950413.1950423},
+ booktitle = {Proceedings of the 19th ACM/SIGDA International Symposium on Field Programmable Gate Arrays},
+ pages = {33–36},
+ numpages = {4},
+ location = {Monterey, CA, USA},
+ series = {FPGA '11}
+}