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}
\email{j.wickerson@imperial.ac.uk}
+% JW notes:
+% - High-level synthesis is increasingly being relied upon.
+% - But it's really flaky. (Cite bugs from FCCM submission etc.)
+% - There exist some workarounds. (Testing the output, formally verifying the output, etc.)
+% - The time has come to prove the tool itself correct. (Mention success of Compcert and other fully verified tools?)
+% - We've made some encouraging progress on this front in a prototype tool called Vericert. (Summarise current state of Vericert, and how it compares performance-wise to LegUp.)
+% - But there's still a long way to go. (List the main things left to do, and how you expect Vericert to compare to LegUp after those things are done.)
+
\begin{abstract}
High-level synthesis (HLS) is increasingly being relied upon as the size of designs and needs for hardware accelerators increases. However, HLS is known to be quite flaky with each tool supporting different input languages and sometimes generating incorrect designs.