Revert the memory model drawing

1 files changed, 2 insertions, 2 deletions

diff --git a/verilog.tex b/verilog.tex
index b0af602..50d7640 100644
--- a/verilog.tex
+++ b/verilog.tex
@@ -130,8 +130,8 @@ The Verilog semantics do not define a memory model for Verilog, as this is not n
 \begin{figure}
   \centering
   \begin{tikzpicture}
-    \fill[compcertmemmodel,rounded corners=3pt] (0,0) rectangle (5,-4.3);
-    \fill[vericertmemmodel,rounded corners=3pt] (7,0) rectangle (12,-4.3);
+    \fill[compcertmemmodel,rounded corners=3pt] (0,0) rectangle (5,-5);
+    \fill[vericertmemmodel,rounded corners=3pt] (7,0) rectangle (12,-5);
     \node[right] at (0,-0.3) {\small \textbf{\compcert{}'s Memory Model}};
     \node[right] at (7,-0.3) {\small \textbf{Verilog Memory Representation}};
     \node[right] (x0) at (0.2,-1.9) {\small 0};