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authorYann Herklotz <git@yannherklotz.com>2021-09-11 20:02:03 +0100
committerYann Herklotz <git@yannherklotz.com>2021-09-11 20:02:03 +0100
commitc7dc8c7f5140166b3a3424f3db83fbe5604084cb (patch)
tree1d77040204b5012dc3e7f495fcc80852bf59d2c1
parent1698908a04f6886f97ad7566928dfcf9c55acb59 (diff)
downloadoopsla21_fvhls-c7dc8c7f5140166b3a3424f3db83fbe5604084cb.tar.gz
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-rw-r--r--algorithm.tex2
-rw-r--r--main.tex2
2 files changed, 3 insertions, 1 deletions
diff --git a/algorithm.tex b/algorithm.tex
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@@ -2,6 +2,8 @@
This section describes the main architecture of the HLS tool, and the way in which the Verilog back end was added to \compcert{}. This section also covers an example of converting a simple C program into hardware, expressed in the Verilog language.
+\subsection{Main Design Decisions}
+
\paragraph{Choice of source language}
C was chosen as the source language as it remains the most common source language amongst production-quality HLS tools~\cite{canis11_legup, xilinx20_vivad_high_synth, intel_hls, bambu_hls}. This, in turn, may be because it is ``[t]he starting point for the vast majority of algorithms to be implemented in hardware''~\cite{5522874}, lending a degree of practicality.
The availability of \compcert{}~\cite{leroy09_formal_verif_realis_compil} also provides a solid basis for formally verified C compilation.
diff --git a/main.tex b/main.tex
index 3bc52d3..2206e06 100644
--- a/main.tex
+++ b/main.tex
@@ -144,7 +144,7 @@
\institution{Imperial College London}
\country{UK}
}
-%\email{james.pollard16@imperial.ac.uk}
+\email{jamespollard@acm.org}
\author{Nadesh Ramanathan}
\orcid{0000-0001-9083-8349}