Make figures fit onto the page

1 files changed, 4 insertions, 4 deletions

diff --git a/algorithm.tex b/algorithm.tex
index 908f488..1068076 100644
--- a/algorithm.tex
+++ b/algorithm.tex
@@ -39,11 +39,11 @@ Existing HLS compilers usually use LLVM IR as an intermediate representation whe
 
 \begin{figure}
   \centering
-  \begin{subfigure}[b]{0.4\linewidth}
+  \begin{subfigure}[b]{0.5\linewidth}
     \inputminted{c}{data/accumulator.c}
     \caption{Accumulator C code.}\label{fig:accumulator_c}
   \end{subfigure}%
-  \begin{subfigure}[b]{0.6\linewidth}
+  \begin{subfigure}[b]{0.5\linewidth}
     \inputminted[fontsize=\footnotesize]{c}{data/accumulator.rtl}
     \caption{Accumulator RTL code.}\label{fig:accumulator_rtl}
   \end{subfigure}
@@ -53,11 +53,11 @@ Existing HLS compilers usually use LLVM IR as an intermediate representation whe
 \begin{figure}
   \centering
   \begin{subfigure}[b]{0.5\linewidth}
-    \inputminted[fontsize=\tiny]{systemverilog}{data/accumulator.htl}
+    \inputminted[fontsize=\tiny]{systemverilog}{data/accumulator1.v}
     \caption{Accumulator HTL code.}\label{fig:accumulator_htl}
   \end{subfigure}%
   \begin{subfigure}[b]{0.5\linewidth}
-    \inputminted[fontsize=\tiny]{systemverilog}{data/accumulator.v}
+    \inputminted[fontsize=\tiny]{systemverilog}{data/accumulator2.v}
     \caption{Accumulator Verilog code.}\label{fig:accumulator_v}
   \end{subfigure}
   \caption{Accumulator example using CompCert to translate from HTL to Verilog.\YH{I feel like these examples take up too much space, but don't really know of a different way to show off a complete example without the long code.}}\label{fig:accumulator_htl_v}