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| author | Yann Herklotz <git@yannherklotz.com> | 2020-11-18 18:15:51 +0000 |
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| committer | Yann Herklotz <git@yannherklotz.com> | 2020-11-18 18:15:51 +0000 |
| commit | f8870105192ed554380f2c61690c01e0e824a041 (patch) | |
| tree | bba3c135abda3d01124db9b1ce32d856e3fb4b69 /proof.tex | |
| parent | 91621b32867110c6feb6fb97d01bfecfb388f446 (diff) | |
| download | oopsla21_fvhls-f8870105192ed554380f2c61690c01e0e824a041.tar.gz oopsla21_fvhls-f8870105192ed554380f2c61690c01e0e824a041.zip | |
Add better dashes
Diffstat (limited to 'proof.tex')
| -rw-r--r-- | proof.tex | 14 |
1 files changed, 7 insertions, 7 deletions
@@ -112,13 +112,13 @@ The Verilog semantics that are used are deterministic, as the order of operation \toprule & \textbf{Coq code} & \textbf{OCaml code} & \textbf{Specifications} & \textbf{Theorems \& Proofs} & \textbf{Total}\\ \midrule - {Data structures and libraries} & 274 & - & - & 654 & 928 \\ - {Integers and values} & 98 & - & 15 & 744 & 857 \\ - {HTL semantics} & - & - & 174 & - & 174 \\ - {HTL generation} & 655 & - & 79 & 3349 & 4083 \\ - {Verilog semantics} & - & - & 739 & 174 & 913 \\ - {Verilog generation} & 68 & - & - & 396 & 464 \\ - {Top-level driver, pretty printers} & 89 & 747 & - & 209 & 1045 \\ + {Data structures and libraries} & 274 & --- & --- & 654 & 928 \\ + {Integers and values} & 98 & --- & 15 & 744 & 857 \\ + {HTL semantics} & --- & --- & 174 & --- & 174 \\ + {HTL generation} & 655 & --- & 79 & 3349 & 4083 \\ + {Verilog semantics} & --- & --- & 739 & 174 & 913 \\ + {Verilog generation} & 68 & --- & --- & 396 & 464 \\ + {Top-level driver, pretty printers} & 89 & 747 & --- & 209 & 1045 \\ \midrule \textbf{Total} & 1184 & 747 & 1007 & 5526 & 8464 \\ \bottomrule |