Update some sections

1 files changed, 62 insertions, 14 deletions

diff --git a/references.bib b/references.bib
index 78a317a..27cc88f 100644
--- a/references.bib
+++ b/references.bib
@@ -357,20 +357,14 @@
   series =       {PLDI 2019},
 }
 
-@inproceedings{canis+11,
-  author    = {Andrew Canis and
-               Jongsok Choi and
-               Mark Aldham and
-               Victor Zhang and
-               Ahmed Kammoona and
-               Jason Helge Anderson and
-               Stephen Dean Brown and
-               Tomasz S. Czajkowski},
-  title     = {{LegUp}: high-level synthesis for {FPGA}-based processor/accelerator systems},
-  booktitle = {{FPGA}},
-  pages     = {33--36},
-  publisher = {{ACM}},
-  year      = {2011}
+@inproceedings{canis11_legup,
+  author          = {Andrew Canis and Jongsok Choi and Mark Aldham and Victor Zhang and Ahmed
+                  Kammoona and Jason Helge Anderson and Stephen Dean Brown and Tomasz S. Czajkowski},
+  title           = {{LegUp}: high-level synthesis for {FPGA}-based processor/accelerator systems},
+  booktitle       = {{FPGA}},
+  year            = 2011,
+  pages           = {33--36},
+  publisher       = {{ACM}},
 }
 
 @inproceedings{choi+18,
@@ -436,3 +430,57 @@
   month           = {April},
   type            = {Standard},
 }
+
+@misc{xilinx20_vivad_high_synth,
+  author          = {Xilinx},
+  title           = {Vivado High-level Synthesis},
+  url             = {https://bit.ly/39ereMx},
+  urldate         = {2020-07-20},
+  year            = 2020,
+}
+
+@misc{intel20_sdk_openc_applic,
+  author          = {Intel},
+  title           = {{SDK} for {OpenCL} Applications},
+  url             = {https://intel.ly/30sYHz0},
+  urldate         = {2020-07-20},
+  year            = 2020,
+}
+
+@inproceedings{nigam20_predic_accel_desig_time_sensit_affin_types,
+  author          = {Nigam, Rachit and Atapattu, Sachille and Thomas, Samuel and Li, Zhijing and
+                  Bauer, Theodore and Ye, Yuwei and Koti, Apurva and Sampson, Adrian and Zhang,
+                  Zhiru},
+  title           = {Predictable Accelerator Design with Time-Sensitive Affine Types},
+  booktitle       = {Proceedings of the 41st ACM SIGPLAN Conference on Programming Language Design
+                  and Implementation},
+  year            = 2020,
+  pages           = {393-407},
+  doi             = {10.1145/3385412.3385974},
+  url             = {https://doi.org/10.1145/3385412.3385974},
+  address         = {New York, NY, USA},
+  isbn            = 9781450376136,
+  keywords        = {Affine Type Systems, High-Level Synthesis},
+  location        = {London, UK},
+  numpages        = 15,
+  publisher       = {Association for Computing Machinery},
+  series          = {PLDI 2020},
+}
+
+@inproceedings{bourgeat20_essen_blues,
+  author          = {Bourgeat, Thomas and Pit-Claudel, Cl\'{e}ment and Chlipala, Adam and Arvind},
+  title           = {The Essence of Bluespec: A Core Language for Rule-Based Hardware Design},
+  booktitle       = {Proceedings of the 41st ACM SIGPLAN Conference on Programming Language Design
+                  and Implementation},
+  year            = 2020,
+  pages           = {243-257},
+  doi             = {10.1145/3385412.3385965},
+  url             = {https://doi.org/10.1145/3385412.3385965},
+  address         = {New York, NY, USA},
+  isbn            = 9781450376136,
+  keywords        = {Hardware Description Language, Compiler Correctness, Semantics},
+  location        = {London, UK},
+  numpages        = 15,
+  publisher       = {Association for Computing Machinery},
+  series          = {PLDI 2020},
+}