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| author | Yann Herklotz <git@yannherklotz.com> | 2021-08-08 23:34:17 +0200 |
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| committer | Yann Herklotz <git@yannherklotz.com> | 2021-08-08 23:34:17 +0200 |
| commit | dc23a3e2a53cb56e0bde73a3d0ae7206ab13bafd (patch) | |
| tree | 3568c78d08f43811327135d7c03e3b64bf3b25fd /references.bib | |
| parent | 3aa90b4b91627bc851f79b47164280541f0c363c (diff) | |
| download | oopsla21_fvhls-dc23a3e2a53cb56e0bde73a3d0ae7206ab13bafd.tar.gz oopsla21_fvhls-dc23a3e2a53cb56e0bde73a3d0ae7206ab13bafd.zip | |
Fix some more notes
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| -rw-r--r-- | references.bib | 12 |
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diff --git a/references.bib b/references.bib index 1da9d3b..6a5360c 100644 --- a/references.bib +++ b/references.bib @@ -981,3 +981,15 @@ series = {CPP 2021} pages = {442-449}, doi = {10.1109/ICCAD.2007.4397305} } + +@inproceedings{noronha17_rapid_fpga, + keywords = {high-level synthesis, FPGA, inlining, compiler optimisation}, + author = {D. H. {Noronha} and J. P. {Pinilla} and S. J. E. {Wilton}}, + booktitle = {2017 International Conference on ReConFigurable Computing and FPGAs (ReConFig)}, + title = {Rapid circuit-specific inlining tuning for FPGA high-level synthesis}, + year = {2017}, + volume = {}, + number = {}, + pages = {1-6}, + doi = {10.1109/RECONFIG.2017.8279807} +} |