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-rw-r--r--archive/verilog.tex2
1 files changed, 1 insertions, 1 deletions
diff --git a/archive/verilog.tex b/archive/verilog.tex
index a363596..e4c7816 100644
--- a/archive/verilog.tex
+++ b/archive/verilog.tex
@@ -3,7 +3,7 @@ When targeting a hardware description language such as Verilog, it is important
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-Using these constructs it is therefore possible to describe how hardware functions, where always blocks that are triggered by a clock periodically get translated into flip-flops and always blocks triggered by changes in any internal signals are translated into combinational logic.
+Using these constructs it is therefore possible to describe how hardware functions, where always-blocks that are triggered by a clock periodically get translated into flip-flops and always blocks triggered by changes in any internal signals are translated into combinational logic.
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