Add

1 files changed, 16 insertions, 17 deletions

diff --git a/references.bib b/references.bib
index bf2ec87..1ed2e1f 100644
--- a/references.bib
+++ b/references.bib
@@ -186,7 +186,7 @@ year = {2020},
 }
 
 @inproceedings{gupta03_spark,
-  author          = {S. {Gupta} and N. {Dutt} and R. {Gupta} and A. {Nicolau}},
+  author          = {{Gupta}, S. and {Dutt}, N. and {Gupta}, R. and {Nicolau}, A.},
   title           = {{SPARK}: a high-level synthesis framework for applying parallelizing compiler
                   transformations},
   booktitle       = {16th International Conference on VLSI Design, 2003. Proceedings.},
@@ -199,7 +199,7 @@ year = {2020},
 }
 
 @article{chouksey20_verif_sched_condit_behav_high_level_synth,
-  author          = {R. {Chouksey} and C. {Karfa}},
+  author          = {Chouksey, R. and Karfa, C.},
   title           = {Verification of Scheduling of Conditional Behaviors in
                   High-Level Synthesis},
   journal         = {IEEE Transactions on Very Large Scale Integration (VLSI)
@@ -215,7 +215,7 @@ year = {2020},
 }
 
 @inproceedings{pnueli98_trans,
-  author          = "Pnueli, A.  and Siegel, M.  and Singerman, E.",
+  author          = "Pnueli, A. and Siegel, M. and Singerman, E.",
   title           = "Translation validation",
   booktitle       = "Tools and Algorithms for the Construction and Analysis of Systems",
   year            = 1998,
@@ -228,7 +228,7 @@ year = {2020},
 }
 
 @article{chouksey19_trans_valid_code_motion_trans_invol_loops,
-  author =       {R. {Chouksey} and C. {Karfa} and P. {Bhaduri}},
+  author =       {{Chouksey}, R. and {Karfa}, C. and {Bhaduri}, P.},
   title =        {Translation Validation of Code Motion Transformations
                   Involving Loops},
   journal =      {IEEE Transactions on Computer-Aided Design of Integrated
@@ -243,7 +243,7 @@ year = {2020},
 }
 
 @article{banerjee14_verif_code_motion_techn_using_value_propag,
-  author = {K. {Banerjee} and C. {Karfa} and D. {Sarkar} and C. {Mandal}},
+  author = {{Banerjee}, K. and {Karfa}, C. and {Sarkar}, D. and {Mandal}, C.},
   title = {Verification of Code Motion Techniques Using Value
                   Propagation},
   journal = {IEEE Transactions on Computer-Aided Design of Integrated
@@ -258,7 +258,7 @@ year = {2020},
 }
 
 @inproceedings{kim04_autom_fsmd,
-  author = { {Youngsik Kim} and S. {Kopuri} and N. {Mansouri}},
+  author = { {Youngsik Kim} and {Kopuri}, S. and {Mansouri}, N.},
   title = {Automated formal verification of scheduling process using
                   finite state machines with datapath (FSMD)},
   booktitle = {International Symposium on Signals, Circuits and
@@ -306,7 +306,7 @@ year = {2020},
 }
 
 @book{bertot04_inter_theor_provin_progr_devel,
-  author          = {Yves Bertot and Pierre Cast{\'{e}}ran},
+  author          = {Bertot, Yves and Cast{\'{e}}ran, Pierre},
   title           = {Interactive Theorem Proving and Program Development},
   year            = 2004,
   publisher       = {Springer Berlin Heidelberg},
@@ -345,7 +345,7 @@ year = {2020},
 }
 
 @inproceedings{chapman92_verif_bedroc,
-  author          = {R. {Chapman} and G. {Brown} and M. {Leeser}},
+  author          = {{Chapman}, R. and {Brown}, G. and {Leeser}, M.},
   title           = {Verified high-level synthesis in BEDROC},
   booktitle       = {[1992] Proceedings The European Conference on Design Automation},
   year            = 1992,
@@ -356,7 +356,7 @@ year = {2020},
 }
 
 @article{hwang91_formal_approac_to_sched_probl,
-  author = {C. -. {Hwang} and J. -. {Lee} and Y. -. {Hsu}},
+  author = {{Hwang}, C. -. and {Lee}, J. -. and {Hsu}, Y. -.},
   title = {A Formal Approach To the Scheduling Problem in High Level
                   Synthesis},
   journal = {IEEE Transactions on Computer-Aided Design of Integrated
@@ -381,7 +381,7 @@ year = {2020},
 }
 
 @inproceedings{grass94_high,
-  author = {W. {Grass} and M. {Mutz} and W. -. {Tiedemann}},
+  author = {{Grass}, W. and {Mutz}, M. and {Tiedemann}, W. -.},
   title = {High level synthesis based on formal methods},
   booktitle = {Proceedings of Twentieth Euromicro Conference. System
                   Architecture and Integration},
@@ -404,7 +404,7 @@ year = {2020},
 }
 
 @article{perna12_mechan_wire_wise_verif_handel_c_synth,
-  author = "Juan Perna and Jim Woodcock",
+  author = "Perna, Juan and Woodcock, Jim",
   title = {Mechanised Wire-Wise Verification of {Handel-C} Synthesis},
   journal = "Science of Computer Programming",
   volume = 77,
@@ -470,8 +470,8 @@ year = {2020},
 }
 
 @inproceedings{canis11_legup,
-  author          = {Andrew Canis and Jongsok Choi and Mark Aldham and Victor Zhang and Ahmed
-                  Kammoona and Jason Helge Anderson and Stephen Dean Brown and Tomasz S. Czajkowski},
+  author          = {Canis, Andrew and Choi, Jongsok and Aldham, Mark and Zhang, Victor and
+                  Kammoona, Ahmed and Anderson, Jason Helge and Brown, Stephen Dean and Czajkowski, Tomasz S.},
   title           = {{LegUp}: high-level synthesis for {FPGA}-based processor/accelerator systems},
   booktitle       = {{FPGA}},
   year            = 2011,
@@ -481,7 +481,7 @@ year = {2020},
 }
 
 @INPROCEEDINGS{choi+18,
-  author={Y. {Choi} and J. {Cong}},
+  author={{Choi}, Y. and {Cong}, J.},
   booktitle={2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)},
   title={HLS-Based Optimization and Design Space Exploration for Applications with Variable Loop Bounds},
   year={2018},
@@ -557,8 +557,7 @@ year = {2020},
 }
 
 @inproceedings{homsirikamol+14,
-  author    = {Ekawat Homsirikamol and
-               Kris Gaj},
+  author    = {Homsirikamol, Ekawat and Gaj, Kris},
   title     = {Can high-level synthesis compete against a hand-written code in the
                cryptographic domain? {A} case study},
   booktitle = {ReConFig},
@@ -979,7 +978,7 @@ series = {CPP 2021}
 	doi = {10.1109/RECONFIG.2017.8279807}
 }
 
-@software{yann_herklotz_2021_5093839,
+@misc{yann_herklotz_2021_5093839,
   author       = {Yann Herklotz and
                   James D. Pollard and
                   Nadesh Ramanathan and