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| author | Yann Herklotz <git@yannherklotz.com> | 2021-09-29 22:03:06 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2021-09-29 22:03:06 +0100 |
| commit | 5d42b5fc8b24492f4457ccd541751db869fefc20 (patch) | |
| tree | db3b7aaf01b76cd55e9d490dcbf40ebec84508f9 /src/Compiler.v | |
| parent | bb5695f5bcb9f3c3c7948c0f3a36da55ba5dcbcf (diff) | |
| parent | ab1e748f622f4345a3fc13ebbdbc8f223bd10e5c (diff) | |
| download | vericert-kvx-5d42b5fc8b24492f4457ccd541751db869fefc20.tar.gz vericert-kvx-5d42b5fc8b24492f4457ccd541751db869fefc20.zip | |
Merge remote-tracking branch 'origin/develop' into develop
Diffstat (limited to 'src/Compiler.v')
| -rw-r--r-- | src/Compiler.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/Compiler.v b/src/Compiler.v index de29889..268f451 100644 --- a/src/Compiler.v +++ b/src/Compiler.v @@ -216,7 +216,7 @@ Definition transf_hls (p : Csyntax.program) : res Verilog.program := (* This is an unverified version of transf_hls with some experimental additions such as scheduling that aren't completed yet. *) -(*Definition transf_hls_temp (p : Csyntax.program) : res Verilog.program := +Definition transf_hls_temp (p : Csyntax.program) : res Verilog.program := OK p @@@ SimplExpr.transl_program @@@ SimplLocals.transf_program @@ -245,7 +245,7 @@ that aren't completed yet. *) @@@ RTLPargen.transl_program @@@ HTLPargen.transl_program @@ print print_HTL - @@ Veriloggen.transl_program.*) + @@ Veriloggen.transl_program. (*| Correctness Proof |