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| author | Yann Herklotz <git@yannherklotz.com> | 2021-09-27 18:14:33 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2021-09-27 20:23:31 +0100 |
| commit | 02ca043e9c2d2aec31aec5a323535924a4414696 (patch) | |
| tree | f93d50466958960eb7ded7b333ae1619933a640b /src/extraction/Extraction.v | |
| parent | a6fb1adadcf2421b76cde649369f457a2a9ed66c (diff) | |
| download | vericert-kvx-02ca043e9c2d2aec31aec5a323535924a4414696.tar.gz vericert-kvx-02ca043e9c2d2aec31aec5a323535924a4414696.zip | |
Add dependencies for Alectryon documentation
Update README on the status of Vericert
Diffstat (limited to 'src/extraction/Extraction.v')
| -rw-r--r-- | src/extraction/Extraction.v | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/extraction/Extraction.v b/src/extraction/Extraction.v index 6abe4e0..6bbfc05 100644 --- a/src/extraction/Extraction.v +++ b/src/extraction/Extraction.v @@ -179,7 +179,7 @@ Extract Inlined Constant Bracket.inbetween_loc => "fun _ -> assert false". Extract Constant Pipeline.pipeline => "SoftwarePipelining.pipeline". Extract Constant RTLBlockgen.partition => "Partition.partition". -(*Extract Constant RTLPargen.schedule => "Schedule.schedule_fn".*) +Extract Constant RTLPargen.schedule => "Schedule.schedule_fn". (* Needed in Coq 8.4 to avoid problems with Function definitions. *) Set Extraction AccessOpaque. @@ -187,11 +187,11 @@ Set Extraction AccessOpaque. Cd "src/extraction". Separate Extraction Verilog.module vericert.Compiler.transf_hls -(* vericert.Compiler.transf_hls_temp*) -(* RTLBlockgen.transl_program RTLBlockInstr.successors_instr*) + vericert.Compiler.transf_hls_temp + RTLBlockgen.transl_program RTLBlockInstr.successors_instr HTLgen.tbl_to_case_expr Pipeline.pipeline -(* RTLBlockInstr.sat_pred_temp*) + RTLBlockInstr.sat_pred_simple Verilog.stmnt_to_list Compiler.transf_c_program Compiler.transf_cminor_program |