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author | Yann Herklotz <git@yannherklotz.com> | 2021-09-18 14:40:45 +0100 |
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committer | Yann Herklotz <git@yannherklotz.com> | 2021-09-18 14:40:45 +0100 |
commit | b666f88219893c82361606f8652297ecc7fb7a9f (patch) | |
tree | 946c2ddb5ce21b7af24ce6945fe5f83cbb274061 /src/extraction | |
parent | c4d44af5f3135aba4d4878f8f41c80d1f0b9e9a2 (diff) | |
parent | c4436c02648502c4cb327d2018229e62a2c0d1c0 (diff) | |
download | vericert-kvx-b666f88219893c82361606f8652297ecc7fb7a9f.tar.gz vericert-kvx-b666f88219893c82361606f8652297ecc7fb7a9f.zip |
Merge branch 'master' into develop
Diffstat (limited to 'src/extraction')
-rw-r--r-- | src/extraction/Extraction.v | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/extraction/Extraction.v b/src/extraction/Extraction.v index 00a1f00..6abe4e0 100644 --- a/src/extraction/Extraction.v +++ b/src/extraction/Extraction.v @@ -179,7 +179,7 @@ Extract Inlined Constant Bracket.inbetween_loc => "fun _ -> assert false". Extract Constant Pipeline.pipeline => "SoftwarePipelining.pipeline". Extract Constant RTLBlockgen.partition => "Partition.partition". -Extract Constant RTLPargen.schedule => "Schedule.schedule_fn". +(*Extract Constant RTLPargen.schedule => "Schedule.schedule_fn".*) (* Needed in Coq 8.4 to avoid problems with Function definitions. *) Set Extraction AccessOpaque. @@ -187,11 +187,11 @@ Set Extraction AccessOpaque. Cd "src/extraction". Separate Extraction Verilog.module vericert.Compiler.transf_hls - vericert.Compiler.transf_hls_temp - RTLBlockgen.transl_program RTLBlockInstr.successors_instr +(* vericert.Compiler.transf_hls_temp*) +(* RTLBlockgen.transl_program RTLBlockInstr.successors_instr*) HTLgen.tbl_to_case_expr Pipeline.pipeline - RTLBlockInstr.sat_pred_temp +(* RTLBlockInstr.sat_pred_temp*) Verilog.stmnt_to_list Compiler.transf_c_program Compiler.transf_cminor_program |