diff options
| author | James Pollard <james@pollard.dev> | 2020-06-03 17:31:35 +0100 |
|---|---|---|
| committer | James Pollard <james@pollard.dev> | 2020-06-03 17:31:35 +0100 |
| commit | e3c66ff88570c5370b37f51404f71f485d2e5dfe (patch) | |
| tree | 87168bb6494adf1c11d0e569f86634a42beb0ae7 /src/translation/HTLgen.v | |
| parent | 6bb3ff9cd85a52cd7c6509515a5e9f05bd0bb16f (diff) | |
| download | vericert-kvx-e3c66ff88570c5370b37f51404f71f485d2e5dfe.tar.gz vericert-kvx-e3c66ff88570c5370b37f51404f71f485d2e5dfe.zip | |
HTLgenspec status in line with develop
Diffstat (limited to 'src/translation/HTLgen.v')
| -rw-r--r-- | src/translation/HTLgen.v | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/translation/HTLgen.v b/src/translation/HTLgen.v index 04cb7b8..b573b06 100644 --- a/src/translation/HTLgen.v +++ b/src/translation/HTLgen.v @@ -274,7 +274,7 @@ Definition translate_instr (op : Op.operation) (args : list reg) : mon expr := | Op.Ocmp c, _ => translate_condition c args | Op.Olea a, _ => translate_eff_addressing a args | Op.Oleal a, _ => translate_eff_addressing a args (* FIXME: Need to be careful here; large arrays might fail? *) - | Op.Ocast32signed, r::nill => ret (Vvar r) (* FIXME: Don't need to sign extend for now since everything is 32 bit? *) + | Op.Ocast32signed, r::nil => ret (Vvar r) (* FIXME: Don't need to sign extend for now since everything is 32 bit? *) | _, _ => error (Errors.msg "Veriloggen: Instruction not implemented: other") end. @@ -425,6 +425,7 @@ Definition transf_module (f: function) : mon module := current_state.(st_controllogic) f.(fn_entrypoint) current_state.(st_st) + stack fin rtrn). |