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| author | Yann Herklotz <git@yannherklotz.com> | 2020-06-12 13:18:40 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2020-06-12 13:18:40 +0100 |
| commit | 0f9ab38389000edfa2376fabace69d2366d32647 (patch) | |
| tree | 54701827fe527c87c1bb64365e3f848416b54a6a /src/verilog/PrintVerilog.ml | |
| parent | c54b32a91427e5342ce5ffa94b2398a2fcb8c144 (diff) | |
| download | vericert-kvx-0f9ab38389000edfa2376fabace69d2366d32647.tar.gz vericert-kvx-0f9ab38389000edfa2376fabace69d2366d32647.zip | |
Fix declaring function arguments correctly
Diffstat (limited to 'src/verilog/PrintVerilog.ml')
| -rw-r--r-- | src/verilog/PrintVerilog.ml | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/verilog/PrintVerilog.ml b/src/verilog/PrintVerilog.ml index d81bf18..700b8e3 100644 --- a/src/verilog/PrintVerilog.ml +++ b/src/verilog/PrintVerilog.ml @@ -180,8 +180,7 @@ let pprint_module i n m = concat [ indent i; "module "; (extern_atom n); "("; concat (intersperse ", " (List.map register (inputs @ outputs))); ");\n"; fold_map (pprint_module_item (i+1)) m.mod_body; - indent i; "endmodule\n\n"; - testbench + indent i; "endmodule\n\n" ] let print_result pp lst = @@ -201,4 +200,5 @@ let print_globdef pp (id, gd) = | _ -> () let print_program pp prog = - List.iter (print_globdef pp) prog.prog_defs + List.iter (print_globdef pp) prog.prog_defs; + pstr pp testbench |