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authorYann Herklotz <git@yannherklotz.com>2020-03-29 16:37:40 +0100
committerYann Herklotz <git@yannherklotz.com>2020-03-29 16:37:40 +0100
commit536f154b75a0bb5a9d24a66257e9dddd18ea39e8 (patch)
tree5ae089011e48e35710d4f4512e57e782b9d395f2 /src/verilog/PrintVerilog.mli
parent714eefa9224786617aa7f81b6805b4a88e6744d8 (diff)
downloadvericert-kvx-536f154b75a0bb5a9d24a66257e9dddd18ea39e8.tar.gz
vericert-kvx-536f154b75a0bb5a9d24a66257e9dddd18ea39e8.zip
Rename Verilog AST files
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diff --git a/src/verilog/PrintVerilog.mli b/src/verilog/PrintVerilog.mli
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+(*
+ * CoqUp: Verified high-level synthesis.
+ * Copyright (C) 2019-2020 Yann Herklotz <yann@yannherklotz.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <https://www.gnu.org/licenses/>.
+ *)
+
+val prettyprint : VerilogAST.verilog -> string