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| author | Yann Herklotz <git@yannherklotz.com> | 2020-06-28 23:48:06 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2020-06-28 23:48:06 +0100 |
| commit | 0c360ec297c42d73c1090958d061447c2bfbe31b (patch) | |
| tree | 8990070566dd45f5a8198e67b970fa7cab768ffe /src/verilog | |
| parent | a83cd5feed50d90de67da4ec78e0281520dbdf1f (diff) | |
| download | vericert-kvx-0c360ec297c42d73c1090958d061447c2bfbe31b.tar.gz vericert-kvx-0c360ec297c42d73c1090958d061447c2bfbe31b.zip | |
Fix proof again with Verilog semantics changes
Diffstat (limited to 'src/verilog')
| -rw-r--r-- | src/verilog/Value.v | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/verilog/Value.v b/src/verilog/Value.v index 52a87e3..e7b2362 100644 --- a/src/verilog/Value.v +++ b/src/verilog/Value.v @@ -345,6 +345,18 @@ Proof. simpl. rewrite <- Pos2Z.inj_pow_pos. trivial. Qed. +Lemma valueToPos_posToValue : + forall p, valueToPos (posToValueAuto p) = p. +Proof. + intros. unfold valueToPos, posToValueAuto. + rewrite uvalueToZ_ZToValue. auto. rewrite positive_nat_Z. + split. apply Zle_0_pos. + + assert (p < 2 ^ (Pos.size p))%positive by apply Pos.size_gt. + inversion H. rewrite <- Z.compare_lt_iff. rewrite <- H1. + simpl. rewrite <- Pos2Z.inj_pow_pos. trivial. +Qed. + Lemma valueToInt_intToValue : forall v, valueToInt (intToValue v) = v. |