| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add more operators and print them | Yann Herklotz | 2020-03-31 | 1 | -37/+69 |
| * | Improve Verilog error messages | Yann Herklotz | 2020-03-31 | 1 | -1/+7 |
| * | Rename to transf_program | Yann Herklotz | 2020-03-29 | 1 | -1/+1 |
| * | Complete conversion from HTL to Verilog | Yann Herklotz | 2020-03-29 | 1 | -8/+91 |
| * | Add Verilog generation from HTL | Yann Herklotz | 2020-03-29 | 1 | -0/+135 |
| * | Remove unnecessary examples from HTL | Yann Herklotz | 2020-03-29 | 1 | -6/+1 |
| * | Create HTLgen | Yann Herklotz | 2020-03-25 | 3 | -148/+5 |
| * | Add Maps and HTL.v | Yann Herklotz | 2020-03-25 | 1 | -0/+186 |
| * | Create a new direct translation | Yann Herklotz | 2020-03-22 | 2 | -14/+125 |
| * | Update names of directories | Yann Herklotz | 2020-03-19 | 1 | -0/+37 |
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index : vericert-kvx | |
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