| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add lessdef for values | Yann Herklotz | 2020-05-08 | 1 | -3/+10 |
| * | Add AssocMap | Yann Herklotz | 2020-05-08 | 4 | -47/+93 |
| * | Redefine HTL for intermediate Verilog language | Yann Herklotz | 2020-05-07 | 1 | -76/+69 |
| * | Use associations instead of state | Yann Herklotz | 2020-05-07 | 2 | -70/+69 |
| * | Rename assoclist to assocset | Yann Herklotz | 2020-05-07 | 2 | -28/+28 |
| * | Add changes to value | Yann Herklotz | 2020-05-06 | 1 | -2/+9 |
| * | Refine test file | Yann Herklotz | 2020-05-05 | 1 | -5/+2 |
| * | Minimised manual simulation | Yann Herklotz | 2020-05-05 | 2 | -45/+14 |
| * | Simplifications to proof | Yann Herklotz | 2020-05-05 | 3 | -18/+15 |
| * | Finish manual simulation | Yann Herklotz | 2020-05-05 | 2 | -5/+68 |
| * | Add equality check for value | Yann Herklotz | 2020-05-04 | 2 | -16/+22 |
| * | Refine the semantics | Yann Herklotz | 2020-05-04 | 3 | -56/+130 |
| * | Add code to debug execution of HLSsave/old-step | Yann Herklotz | 2020-05-03 | 1 | -0/+73 |
| * | Add hex notation to values | Yann Herklotz | 2020-05-03 | 1 | -0/+9 |
| * | Change to State | Yann Herklotz | 2020-05-03 | 1 | -21/+22 |
| * | Add CompCert semantics for Verilog | Yann Herklotz | 2020-04-24 | 1 | -81/+152 |
| * | Add valueToInt function | Yann Herklotz | 2020-04-24 | 1 | -0/+3 |
| * | Add stmnt_runp inductive | Yann Herklotz | 2020-04-22 | 1 | -27/+106 |
| * | Remove unnecessary Lemma | Yann Herklotz | 2020-04-22 | 1 | -8/+1 |
| * | Use State in semantics instead of splitting it up | Yann Herklotz | 2020-04-22 | 1 | -95/+98 |
| * | Improve printing of results | Yann Herklotz | 2020-04-22 | 2 | -7/+13 |
| * | Fix Verilog.v | Yann Herklotz | 2020-04-17 | 1 | -1/+1 |
| * | Add main module run | Yann Herklotz | 2020-04-17 | 2 | -51/+79 |
| * | Fix printing with new Verilog AST | Yann Herklotz | 2020-04-17 | 2 | -26/+54 |
| * | Add Verilog semantics with new Verilog module | Yann Herklotz | 2020-04-15 | 1 | -33/+326 |
| * | Create Value module for bitvectors | Yann Herklotz | 2020-04-15 | 1 | -0/+217 |
| * | Handle loops and conditionals correctly | Yann Herklotz | 2020-04-02 | 2 | -12/+53 |
| * | Update compilation | Yann Herklotz | 2020-04-01 | 3 | -14/+81 |
| * | Add documentation and fix makefile for Compcert | Yann Herklotz | 2020-03-31 | 2 | -1/+26 |
| * | Add more operators and print them | Yann Herklotz | 2020-03-31 | 2 | -4/+15 |
| * | Improve Verilog error messages | Yann Herklotz | 2020-03-31 | 1 | -1/+4 |
| * | Fix Verilog printing | Yann Herklotz | 2020-03-31 | 2 | -33/+35 |
| * | Change Verilog AST back to more traditional AST | Yann Herklotz | 2020-03-29 | 1 | -30/+44 |
| * | Remove unnecessary examples from HTL | Yann Herklotz | 2020-03-29 | 1 | -4/+4 |
| * | Update AST and value representations | Yann Herklotz | 2020-03-29 | 1 | -213/+42 |
| * | Rename Verilog AST files | Yann Herklotz | 2020-03-29 | 3 | -0/+0 |
| * | Update printing | Yann Herklotz | 2020-03-25 | 3 | -38/+52 |
| * | Remove dunes and make the build recursive | Yann Herklotz | 2020-03-25 | 1 | -4/+0 |
| * | Rename to HTL | Yann Herklotz | 2020-03-23 | 1 | -18/+28 |
| * | Create intermediate VTL language | Yann Herklotz | 2020-03-22 | 1 | -0/+63 |
| * | Add compcert library to coquplib | Yann Herklotz | 2020-03-22 | 1 | -8/+9 |
| * | Lower case folders | Yann Herklotz | 2020-03-19 | 4 | -0/+341 |
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index : vericert-kvx | |
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