Commit message (Collapse) | Author | Age | Files | Lines | ||
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* | Handle loops and conditionals correctly | Yann Herklotz | 2020-04-02 | 3 | -112/+181 | |
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* | Complete translation from simple RTL to Verilog | Yann Herklotz | 2020-04-01 | 1 | -101/+162 | |
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* | Update compilation | Yann Herklotz | 2020-04-01 | 5 | -17/+84 | |
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* | Convert from RTL to Verilog directly | Yann Herklotz | 2020-03-31 | 3 | -21/+45 | |
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* | Add documentation and fix makefile for Compcert | Yann Herklotz | 2020-03-31 | 5 | -76/+101 | |
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* | Add more operators and print them | Yann Herklotz | 2020-03-31 | 3 | -41/+84 | |
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* | Use Compcert extraction | Yann Herklotz | 2020-03-31 | 1 | -2/+161 | |
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* | Improve Verilog error messages | Yann Herklotz | 2020-03-31 | 2 | -2/+11 | |
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* | Fix Verilog printing | Yann Herklotz | 2020-03-31 | 2 | -33/+35 | |
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* | Add main file and global building | Yann Herklotz | 2020-03-31 | 1 | -6/+0 | |
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* | Rename to transf_program | Yann Herklotz | 2020-03-29 | 1 | -1/+1 | |
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* | Move compiler | Yann Herklotz | 2020-03-29 | 1 | -0/+113 | |
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* | Complete conversion from HTL to Verilog | Yann Herklotz | 2020-03-29 | 1 | -8/+91 | |
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* | Change Verilog AST back to more traditional AST | Yann Herklotz | 2020-03-29 | 1 | -30/+44 | |
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* | Add Verilog generation from HTL | Yann Herklotz | 2020-03-29 | 1 | -0/+135 | |
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* | Remove unnecessary examples from HTL | Yann Herklotz | 2020-03-29 | 2 | -10/+5 | |
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* | Update AST and value representations | Yann Herklotz | 2020-03-29 | 1 | -213/+42 | |
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* | Rename Verilog AST files | Yann Herklotz | 2020-03-29 | 3 | -0/+0 | |
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* | Update printing | Yann Herklotz | 2020-03-25 | 4 | -38/+56 | |
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* | Remove dunes and make the build recursive | Yann Herklotz | 2020-03-25 | 4 | -13/+5 | |
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* | Create HTLgen | Yann Herklotz | 2020-03-25 | 3 | -148/+5 | |
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* | Move driver | Yann Herklotz | 2020-03-25 | 3 | -126/+0 | |
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* | Add Maps and HTL.v | Yann Herklotz | 2020-03-25 | 2 | -0/+235 | |
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* | Rename to HTL | Yann Herklotz | 2020-03-23 | 1 | -18/+28 | |
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* | Create intermediate VTL language | Yann Herklotz | 2020-03-22 | 1 | -0/+63 | |
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* | Create a new direct translation | Yann Herklotz | 2020-03-22 | 2 | -14/+125 | |
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* | Add compcert library to coquplib | Yann Herklotz | 2020-03-22 | 2 | -8/+13 | |
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* | Convert Tactics to Coquplib: export common modules | Yann Herklotz | 2020-03-20 | 1 | -1/+8 | |
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* | Lower case folders | Yann Herklotz | 2020-03-19 | 13 | -0/+0 | |
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* | Update names of directories | Yann Herklotz | 2020-03-19 | 3 | -21/+40 | |
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* | Update Verilog AST with flat array | Yann Herklotz | 2020-02-18 | 2 | -0/+7 | |
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* | Create translation | Yann Herklotz | 2020-02-18 | 1 | -0/+18 | |
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* | Update license to be compatible with CompCert | Yann Herklotz | 2020-02-17 | 9 | -16/+173 | |
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* | Add pretty printing for Verilog integrated with CompCert | Yann Herklotz | 2020-02-17 | 16 | -238/+313 | |
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* | Add project files and compcert interconnect | Yann Herklotz | 2020-02-14 | 1 | -0/+79 | |
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* | Improve the Coq sources and add extraction | Yann Herklotz | 2020-02-13 | 3 | -45/+28 | |
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* | Add show typeclass | Yann Herklotz | 2020-02-04 | 1 | -0/+42 | |
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* | Add nix file | Yann Herklotz | 2020-02-04 | 1 | -2/+13 | |
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* | Short proof and add Tactics | Yann Herklotz | 2020-01-29 | 2 | -12/+31 | |
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* | Proof of nat_to_value_is_flat added | Yann Herklotz | 2020-01-29 | 1 | -29/+28 | |
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* | Trying some more proofs | Yann Herklotz | 2020-01-24 | 1 | -7/+50 | |
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* | Added value_to_nat | Yann Herklotz | 2020-01-24 | 2 | -15/+28 | |
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* | Reorder to let it compile again | Yann Herklotz | 2020-01-24 | 1 | -37/+35 | |
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* | Finish some proofs and convert to nat | Yann Herklotz | 2020-01-24 | 1 | -12/+16 | |
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* | Add some proofs about values | Yann Herklotz | 2020-01-23 | 1 | -94/+181 | |
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* | Move into src directory | Yann Herklotz | 2020-01-22 | 3 | -0/+119 | |