Fix Makefile for verilog backend

4 files changed, 6 insertions, 6 deletions

diff --git a/Makefile b/Makefile
index e036d6f..84908b8 100644
--- a/Makefile
+++ b/Makefile
@@ -1,12 +1,12 @@
 UNAME_S := $(shell uname -s)
 ifeq ($(UNAME_S),Linux)
-	ARCH := x86_64-linux
+	ARCH := verilog-linux
 endif
 ifeq ($(UNAME_S),Darwin)
-	ARCH := x86_64-macosx
+	ARCH := verilog-macosx
 endif
 
-COMPCERTRECDIRS := lib common x86_64 x86 backend cfrontend driver exportclight cparser
+COMPCERTRECDIRS := lib common verilog backend cfrontend driver exportclight cparser
 
 COQINCLUDES := -R src/common vericert.common \
                -R src/extraction vericert.extraction \
diff --git a/_CoqProject b/_CoqProject
index d54c15c..69d12c1 100644
--- a/_CoqProject
+++ b/_CoqProject
@@ -10,7 +10,6 @@
 -R lib/CompCert/driver compcert.driver
 -R lib/CompCert/exportclight compcert.exportclight
 -R lib/CompCert/lib compcert.lib
--R lib/CompCert/x86 compcert.x86
--R lib/CompCert/x86_64 compcert.x86_64
+-R lib/CompCert/verilog compcert.verilog
 -R lib/CompCert/flocq Flocq
 -R lib/CompCert/MenhirLib MenhirLib
diff --git a/dune b/dune
index 92ac822..80eccf1 100644
--- a/dune
+++ b/dune
@@ -1,5 +1,6 @@
 (dirs :standard \ "./lib/CompCert/x86_32" "./lib/CompCert/powerpc" "./lib/CompCert/riscV"
-      "./lib/CompCert/arm" "./lib/CompCert/aarch64" "./lib/CompCert/extraction")
+      "./lib/CompCert/arm" "./lib/CompCert/aarch64" "./lib/CompCert/extraction"
+      "./lib/CompCert/x86" "./lib/CompCert/x86_64")
 
 (include_subdirs unqualified)
 
diff --git a/lib/CompCert b/lib/CompCert
-Subproject dd750a10840889f73759971a531208278188651
+Subproject c63ea340ca90f95089cff070e94694d9a7a643f