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| author | Yann Herklotz <git@yannherklotz.com> | 2021-11-11 12:29:06 +0000 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2021-11-11 12:29:06 +0000 |
| commit | 797e5060b1b6323e06bfb1c86335f19d12810f04 (patch) | |
| tree | 504ceee79a340b42054b2c2dd972b155293b780f /benchmarks/polybench-syn | |
| parent | 00815c1848041ee08bec774b781d015379865c75 (diff) | |
| download | vericert-797e5060b1b6323e06bfb1c86335f19d12810f04.tar.gz vericert-797e5060b1b6323e06bfb1c86335f19d12810f04.zip | |
Update testbench with verilator support
Diffstat (limited to 'benchmarks/polybench-syn')
| -rw-r--r-- | benchmarks/polybench-syn/common.mk | 9 | ||||
| -rwxr-xr-x | benchmarks/polybench-syn/run-vericert.sh | 31 |
2 files changed, 24 insertions, 16 deletions
diff --git a/benchmarks/polybench-syn/common.mk b/benchmarks/polybench-syn/common.mk index 4c6374f..4d450e8 100644 --- a/benchmarks/polybench-syn/common.mk +++ b/benchmarks/polybench-syn/common.mk @@ -4,6 +4,9 @@ VERICERT_OPTS ?= -DSYNTHESIS -fschedule IVERILOG ?= iverilog IVERILOG_OPTS ?= +VERILATOR ?= verilator +VERILATOR_OPTS ?= -Wno-fatal --top main --exe /home/ymherklotz/projects/vericert/driver/verilator_main.cpp + TARGETS ?= %.v: %.c @@ -15,7 +18,11 @@ TARGETS ?= %.gcc: %.c $(CC) $(CFLAGS) $< -o $@ -%: %.iver %.gcc +%.verilator: %.v + $(VERILATOR) $(VERILATOR_OPTS) --Mdir $@ --cc $< + $(MAKE) -C $@ -f Vmain.mk + +%: %.iver %.gcc %.verilator cp $< $@ all: $(TARGETS) diff --git a/benchmarks/polybench-syn/run-vericert.sh b/benchmarks/polybench-syn/run-vericert.sh index 6cf4cd9..ef6964f 100755 --- a/benchmarks/polybench-syn/run-vericert.sh +++ b/benchmarks/polybench-syn/run-vericert.sh @@ -3,38 +3,39 @@ rm exec.csv top=$(pwd) - #set up +#set up while read benchmark ; do - echo "Running "$benchmark + printf "%10s\t" $(echo "$benchmark" | sed -e 's|/| |g') ./$benchmark.gcc > $benchmark.clog cresult=$(cat $benchmark.clog | cut -d' ' -f2) - echo "C output: "$cresult - ./$benchmark.iver > $benchmark.tmp + #echo "C output: "$cresult + #./$benchmark.iver > $benchmark.tmp + ./$benchmark.verilator/Vmain > $benchmark.tmp veriresult=$(tail -1 $benchmark.tmp | cut -d' ' -f2) cycles=$(tail -2 $benchmark.tmp | head -1 | tr -s ' ' | cut -d' ' -f2) - echo "Verilog output: "$veriresult - + #echo "Verilog output: "$veriresult + #Undefined checks if test -z $veriresult then - echo "FAIL: Verilog returned nothing" - #exit 0 + echo "\e[0;91mFAIL\e[0m: Verilog returned nothing" + #exit 0 fi # Don't care checks if [ $veriresult == "x" ] then - echo "FAIL: Verilog returned don't cares" - #exit 0 + echo "\e[0;91mFAIL\e[0m: Verilog returned don't cares" + #exit 0 fi - - # unequal result check + + # unequal result check if [ $cresult -ne $veriresult ] then - echo "FAIL: Verilog and C output do not match!" - #exit 0 + echo -e "\e[0;91mFAIL\e[0m: Verilog and C output do not match!" + #exit 0 else - echo "PASS" + echo -e "\e[0;92mPASS\e[0m" fi name=$(echo $benchmark | awk -v FS="/" '{print $NF}') echo $name","$cycles >> exec.csv |