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authorYann Herklotz <git@yannherklotz.com>2021-07-11 15:59:21 +0200
committerYann Herklotz <git@yannherklotz.com>2021-07-11 15:59:21 +0200
commit178a7c4781c96857fe0a33c777da83e769516152 (patch)
treecf4b5248a144289c84161a6fd73de37523c9d373 /src/Compiler.v
parent3dfc30619a4f3ecf0f262481a0891259c2b37ed1 (diff)
downloadvericert-178a7c4781c96857fe0a33c777da83e769516152.tar.gz
vericert-178a7c4781c96857fe0a33c777da83e769516152.zip
Remove unnecessary files and proofs
Diffstat (limited to 'src/Compiler.v')
-rw-r--r--src/Compiler.v4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/Compiler.v b/src/Compiler.v
index 268f451..de29889 100644
--- a/src/Compiler.v
+++ b/src/Compiler.v
@@ -216,7 +216,7 @@ Definition transf_hls (p : Csyntax.program) : res Verilog.program :=
(* This is an unverified version of transf_hls with some experimental additions such as scheduling
that aren't completed yet. *)
-Definition transf_hls_temp (p : Csyntax.program) : res Verilog.program :=
+(*Definition transf_hls_temp (p : Csyntax.program) : res Verilog.program :=
OK p
@@@ SimplExpr.transl_program
@@@ SimplLocals.transf_program
@@ -245,7 +245,7 @@ Definition transf_hls_temp (p : Csyntax.program) : res Verilog.program :=
@@@ RTLPargen.transl_program
@@@ HTLPargen.transl_program
@@ print print_HTL
- @@ Veriloggen.transl_program.
+ @@ Veriloggen.transl_program.*)
(*|
Correctness Proof