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| author | Yann Herklotz <git@yannherklotz.com> | 2020-06-12 11:37:00 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2020-06-12 11:37:00 +0100 |
| commit | 1ceb1a28f0e08406862f03863c5d00639ada147d (patch) | |
| tree | 6d1125b9967b7bbf151d0f942e41ecdc3ff761f4 /src/Simulator.v | |
| parent | 5355eb2e4346043d8a4ea4cb574a5b47b5a3a1f3 (diff) | |
| download | vericert-1ceb1a28f0e08406862f03863c5d00639ada147d.tar.gz vericert-1ceb1a28f0e08406862f03863c5d00639ada147d.zip | |
Fix top level invocation to translate through HTL
Diffstat (limited to 'src/Simulator.v')
| -rw-r--r-- | src/Simulator.v | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/Simulator.v b/src/Simulator.v index 930971b..83d3e96 100644 --- a/src/Simulator.v +++ b/src/Simulator.v @@ -16,7 +16,7 @@ * along with this program. If not, see <https://www.gnu.org/licenses/>. *) -From Coq Require Import FSets.FMapPositive. +(*From Coq Require Import FSets.FMapPositive. From compcert Require Import Errors. @@ -33,3 +33,4 @@ Definition simulate (n : nat) (m : Verilog.module) : res (Value.value * list (po end. Local Close Scope error_monad_scope. +*) |