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| author | Yann Herklotz <git@yannherklotz.com> | 2021-03-31 20:45:15 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2021-03-31 20:45:15 +0100 |
| commit | 2837868fcc427b2161b083f33d3de495f0c21bf7 (patch) | |
| tree | af64714106456b6c5afb28835735a75e634754a8 /src/hls/PrintVerilog.ml | |
| parent | ff10c279b5ddbac503ed0da1f1e0c25cd0979749 (diff) | |
| download | vericert-2837868fcc427b2161b083f33d3de495f0c21bf7.tar.gz vericert-2837868fcc427b2161b083f33d3de495f0c21bf7.zip | |
Add memory disable
Diffstat (limited to 'src/hls/PrintVerilog.ml')
| -rw-r--r-- | src/hls/PrintVerilog.ml | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/hls/PrintVerilog.ml b/src/hls/PrintVerilog.ml index d076386..61f5b5e 100644 --- a/src/hls/PrintVerilog.ml +++ b/src/hls/PrintVerilog.ml @@ -164,11 +164,14 @@ let decl i = function let pprint_module_item i = function | Vdeclaration d -> decl i d | Valways (e, s) -> - concat [indent i; "always "; pprint_edge_top i e; "\n"; pprint_stmnt (i+1) s] + concat [indent i; "always "; pprint_edge_top i e; "begin\n"; + pprint_stmnt (i+1) s; indent i; "end\n"] | Valways_ff (e, s) -> - concat [indent i; "always "; pprint_edge_top i e; "\n"; pprint_stmnt (i+1) s] + concat [indent i; "always "; pprint_edge_top i e; "begin\n"; + pprint_stmnt (i+1) s; indent i; "end\n"] | Valways_comb (e, s) -> - concat [indent i; "always "; pprint_edge_top i e; "\n"; pprint_stmnt (i+1) s] + concat [indent i; "always "; pprint_edge_top i e; "begin\n"; + pprint_stmnt (i+1) s; indent i; "end\n"] let rec intersperse c = function | [] -> [] |