diff options
| author | Yann Herklotz <git@yannherklotz.com> | 2020-06-22 09:47:18 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2020-06-22 09:47:18 +0100 |
| commit | c02c4c9c4f1e4529526676e5e6aca2b44dd4584c (patch) | |
| tree | c581871ebb13753f5e96a5655071a33be0ef9bf1 /src/verilog/PrintVerilog.mli | |
| parent | cffce3f73e270b2b1d2d94181d7665763b2f965a (diff) | |
| download | vericert-c02c4c9c4f1e4529526676e5e6aca2b44dd4584c.tar.gz vericert-c02c4c9c4f1e4529526676e5e6aca2b44dd4584c.zip | |
Add print for debug always block in module
Diffstat (limited to 'src/verilog/PrintVerilog.mli')
| -rw-r--r-- | src/verilog/PrintVerilog.mli | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/verilog/PrintVerilog.mli b/src/verilog/PrintVerilog.mli index 0df9d06..6544e52 100644 --- a/src/verilog/PrintVerilog.mli +++ b/src/verilog/PrintVerilog.mli @@ -18,6 +18,6 @@ val print_value : out_channel -> Value.value -> unit -val print_program : out_channel -> Verilog.program -> unit +val print_program : bool -> out_channel -> Verilog.program -> unit val print_result : out_channel -> (BinNums.positive * Value.value) list -> unit |