diff options
Diffstat (limited to 'driver/VericertDriver.ml')
| -rw-r--r-- | driver/VericertDriver.ml | 16 |
1 files changed, 14 insertions, 2 deletions
diff --git a/driver/VericertDriver.ml b/driver/VericertDriver.ml index f500499..0c02aeb 100644 --- a/driver/VericertDriver.ml +++ b/driver/VericertDriver.ml @@ -65,6 +65,7 @@ let compile_c_file sourcename ifile ofile = set_dest Vericert.PrintClight.destination option_dclight ".light.c"; set_dest Vericert.PrintCminor.destination option_dcminor ".cm"; set_dest Vericert.PrintRTL.destination option_drtl ".rtl"; + set_dest Vericert.PrintRTLBlock.destination option_drtlblock ".rtlblock"; set_dest Vericert.PrintHTL.destination option_dhtl ".htl"; set_dest Vericert.Regalloc.destination_alloctrace option_dalloctrace ".alloctrace"; set_dest Vericert.PrintLTL.destination option_dltl ".ltl"; @@ -91,7 +92,11 @@ let compile_c_file sourcename ifile ofile = close_out oc end else begin let verilog = - match Vericert.Compiler0.transf_hls csyntax with + let translation = if !option_hls_schedule + then Vericert.Compiler0.transf_hls_temp + else Vericert.Compiler0.transf_hls_opt + in + match translation csyntax with | Vericert.Errors.OK v -> v | Vericert.Errors.Error msg -> @@ -242,6 +247,9 @@ Code generation options: (use -fno-<opt> to turn off -f<opt>) -falign-branch-targets <n> Set alignment (in bytes) of branch targets -falign-cond-branches <n> Set alignment (in bytes) of conditional branches -fcommon Put uninitialized globals in the common section [on]. + +HLS Optimisations: + -fschedule Schedule the resulting hardware [off]. |} ^ target_help ^ toolchain_help ^ @@ -254,6 +262,7 @@ Code generation options: (use -fno-<opt> to turn off -f<opt>) -dclight Save generated Clight in <file>.light.c -dcminor Save generated Cminor in <file>.cm -drtl Save RTL at various optimization points in <file>.rtl.<n> + -drtlblock Save RTLBlock <file>.rtlblock -dhtl Save HTL before Verilog generation <file>.htl -dltl Save LTL after register allocation in <file>.ltl -dmach Save generated Mach code in <file>.mach @@ -351,7 +360,7 @@ let cmdline_actions = Exact "-ffloat-const-prop", Integer(fun n -> option_ffloatconstprop := n); Exact "-falign-functions", Integer(fun n -> check_align n; option_falignfunctions := Some n); Exact "-falign-branch-targets", Integer(fun n -> check_align n; option_falignbranchtargets := n); - Exact "-falign-cond-branches", Integer(fun n -> check_align n; option_faligncondbranchs := n);] @ + Exact "-falign-cond-branches", Integer(fun n -> check_align n; option_faligncondbranchs := n); ] @ f_opt "common" option_fcommon @ (* Target processor options *) (if Vericert.Configuration.arch = "arm" then @@ -379,6 +388,7 @@ let cmdline_actions = Exact "-dclight", Set option_dclight; Exact "-dcminor", Set option_dcminor; Exact "-drtl", Set option_drtl; + Exact "-drtlblock", Set option_drtlblock; Exact "-dhtl", Set option_dhtl; Exact "-dltl", Set option_dltl; Exact "-dalloctrace", Set option_dalloctrace; @@ -391,6 +401,7 @@ let cmdline_actions = option_dclight := true; option_dcminor := true; option_drtl := true; + option_drtlblock := true; option_dhtl := true; option_dltl := true; option_dalloctrace := true; @@ -422,6 +433,7 @@ let cmdline_actions = (* Code generation options *) @ f_opt "fpu" option_ffpu @ f_opt "sse" option_ffpu (* backward compatibility *) + @ f_opt "schedule" option_hls_schedule @ [ (* Catch options that are not handled *) Prefix "-", Self (fun s -> |