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Diffstat (limited to 'src/hls/PrintVerilog.ml')
| -rw-r--r-- | src/hls/PrintVerilog.ml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/hls/PrintVerilog.ml b/src/hls/PrintVerilog.ml index a5fa554..fbb26c5 100644 --- a/src/hls/PrintVerilog.ml +++ b/src/hls/PrintVerilog.ml @@ -82,7 +82,7 @@ let register a = | Some s -> s | None -> sprintf "reg_%d" (P.to_int a) -(*let literal l = sprintf "%d'd%d" (Nat.to_int l.vsize) (Z.to_int (uvalueToZ l))*) +(*let literal l = s printf "%d'd%d" (Nat.to_int l.vsize) (Z.to_int (uvalueToZ l))*) let literal l = let l' = camlint_of_coqint l in |