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* Fix infinite loop in proofdev-michalisYann Herklotz2021-09-191-3/+3
* Add xomega tactic into VericertlibYann Herklotz2021-09-171-0/+2
* Merge remote-tracking branch 'upstream/master' into dev-michalisYann Herklotz2021-09-173-12/+52
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| * Merge remote-tracking branch 'origin/master'Yann Herklotz2021-09-171-0/+19
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| | * Move license to the SoftwarePipelining directoryYann Herklotz2021-09-151-0/+19
| * | Fix compilation with new CompCert versionYann Herklotz2021-09-171-8/+8
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| * Fix proofs for SATYann Herklotz2021-08-121-6/+27
| * Fix pretty printing issue in VerilogYann Herklotz2021-08-121-1/+1
* | Complete callstate proofMichalis Pardalos2021-09-161-6/+43
* | Progress with callstate proofMichalis Pardalos2021-09-151-8/+11
* | Progress with icall proofMichalis Pardalos2021-09-151-16/+106
* | Progress with mem_alloc_zeroMichalis Pardalos2021-09-151-3/+85
* | Prove mem_free_stack_matchMichalis Pardalos2021-09-141-6/+86
* | Add hammer tacticsMichalis Pardalos2021-09-131-0/+3
* | Icall proof progressMichalis Pardalos2021-09-131-35/+85
* | Name the externctrl correctness clausesMichalis Pardalos2021-09-121-11/+18
* | Guard join state with called module finishMichalis Pardalos2021-09-113-6/+14
* | Progress with stackframe matching for IcallMichalis Pardalos2021-09-101-1/+8
* | Prove that called module exists for IcallMichalis Pardalos2021-09-101-2/+26
* | Fix duplicated verilog module instantiationsMichalis Pardalos2021-09-081-75/+92
* | Print declarations in HTL outputMichalis Pardalos2021-09-082-0/+18
* | Fix renamer skipping ram_memMichalis Pardalos2021-09-031-1/+2
* | Print control registers in HTL outputMichalis Pardalos2021-09-031-0/+13
* | Print RAM in HTL outputMichalis Pardalos2021-09-031-0/+17
* | Fix error in map_externctrlMichalis Pardalos2021-09-031-1/+1
* | Remove double clockMichalis Pardalos2021-09-031-10/+2
* | Do not apply externctrl to control registersMichalis Pardalos2021-09-031-34/+18
* | Address ram in renaming passMichalis Pardalos2021-09-023-14/+39
* | Put memorygen after renaming/applyexternctrlMichalis Pardalos2021-09-021-13/+14
* | Use sumbool instead of option for decide_ram_wfMichalis Pardalos2021-09-013-12/+12
* | Start renaming from 2, fixes wf_params checkMichalis Pardalos2021-09-011-1/+1
* | Give specific reasons when ApplyExternctrl failsMichalis Pardalos2021-09-011-1/+5
* | Fix control register ordering in Renaming passMichalis Pardalos2021-09-011-5/+7
* | Give more specific reasons for Renaming failingMichalis Pardalos2021-09-011-1/+5
* | Get top-level proof passingMichalis Pardalos2021-09-011-12/+14
* | Get HTLgenproof to compile with RAM inferenceMichalis Pardalos2021-08-311-2/+9
* | Get Memorygen to compile againMichalis Pardalos2021-08-311-475/+484
* | Get HTLgenspec compiling with RAM inferenceMichalis Pardalos2021-08-311-2/+2
* | Get HTLgen compiling with RAM inferenceMichalis Pardalos2021-08-311-9/+9
* | Get Renaming compiling with RAM inferenceMichalis Pardalos2021-08-313-24/+37
* | Get ApplyExternctrl compiling with RAM inferenceMichalis Pardalos2021-08-311-8/+16
* | WIPMichalis Pardalos2021-08-306-140/+160
* | Merge branch 'oopsla21' into sharing-mergeMichalis Pardalos2021-08-2622-1416/+3952
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| * Remove more OCaml files to compile successfully without admits.Yann Herklotz2021-07-114-1084/+0
| * Remove unnecessary files and proofsYann Herklotz2021-07-116-15/+18
| * Add legup scriptYann Herklotz2021-07-111-1/+1
| * Add docker file and some commentsYann Herklotz2021-07-091-0/+2
| * Clean up Memorygen fileYann Herklotz2021-04-071-219/+1
| * Remove Admitted in the highest of top-levelsv1.2.0Yann Herklotz2021-04-071-5/+10
| * No admitted theorems in Memorygen proof (~‾▿‾)~Yann Herklotz2021-04-071-76/+99