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| author | Yann Herklotz Grave <git@yannherklotzgrave.com> | 2019-02-16 22:23:35 +0000 |
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| committer | Yann Herklotz Grave <git@yannherklotzgrave.com> | 2019-02-16 22:23:44 +0000 |
| commit | 75a909badfa5396204d31243d94a2db614a2a024 (patch) | |
| tree | 26ed31fd540a8a357ffb9076add693150209d6a1 | |
| parent | 5f76e8bd89b231ad099448d37f3f04be41fc78da (diff) | |
| download | verismith-75a909badfa5396204d31243d94a2db614a2a024.tar.gz verismith-75a909badfa5396204d31243d94a2db614a2a024.zip | |
Fix example in documentation
| -rw-r--r-- | src/VeriFuzz/Mutate.hs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/VeriFuzz/Mutate.hs b/src/VeriFuzz/Mutate.hs index 21911b6..92910ea 100644 --- a/src/VeriFuzz/Mutate.hs +++ b/src/VeriFuzz/Mutate.hs @@ -220,7 +220,7 @@ simplify e = e -- simplified further. -- -- >>> GenVerilog . removeId ["x"] $ Id "x" + Id "y" --- (x + (-1'h0)) +-- (x + (1'h0)) removeId :: [Identifier] -> Expr -> Expr removeId i = transform trans |