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| author | Yann Herklotz <git@yannherklotz.com> | 2019-11-26 16:08:01 +0000 |
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| committer | Yann Herklotz <git@yannherklotz.com> | 2019-11-26 16:08:01 +0000 |
| commit | 0fcf8b96445d1ec4b4dafad11d08ec9afe812ca8 (patch) | |
| tree | cad9f0a30c7768fda09345f903ef9da9987a35cf /README.md | |
| parent | 9a5d009704bd42c3a91d7dc21bc030b174aff2ea (diff) | |
| download | verismith-0fcf8b96445d1ec4b4dafad11d08ec9afe812ca8.tar.gz verismith-0fcf8b96445d1ec4b4dafad11d08ec9afe812ca8.zip | |
Update link to paper
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| -rw-r--r-- | README.md | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -2,7 +2,7 @@ Verilog Fuzzer to test the major verilog compilers by generating random, valid and deterministic Verilog. The following resources provide more details about the in depth implementation of Verismith: -- [Verismith paper](https://yannherklotz.com/docs/verismith/verismith_paper.pdf) +- [Verismith FPGA '20 preprint](https://yannherklotz.com/docs/verismith/verismith_paper.pdf) - [Verismith thesis](https://yannherklotz.com/docs/verismith/verismith_thesis.pdf) - [Verismith slides](https://yannherklotz.com/docs/verismith/verismith_slides.pdf) - [Verismith poster](https://yannherklotz.com/docs/verismith/verismith_poster.pdf) |