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| author | Yann Herklotz <git@yannherklotz.com> | 2019-11-13 18:36:29 +0000 |
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| committer | Yann Herklotz <git@yannherklotz.com> | 2019-11-13 18:36:29 +0000 |
| commit | 856e4fb7ec3e7ba59c6d9fceed215dde832441f5 (patch) | |
| tree | 567e9e236014b56347b6c5c308b263e1179c5bd6 /README.md | |
| parent | 25f2c7c948cfb5053747e9450ceb30692d5024f2 (diff) | |
| download | verismith-856e4fb7ec3e7ba59c6d9fceed215dde832441f5.tar.gz verismith-856e4fb7ec3e7ba59c6d9fceed215dde832441f5.zip | |
Add icarus verilog bug
Diffstat (limited to 'README.md')
| -rw-r--r-- | README.md | 6 |
1 files changed, 6 insertions, 0 deletions
@@ -50,6 +50,12 @@ The fuzzer generates combinational and behavioural Verilog to test the various t | Mis-synthesis | [Forum 982518](https://forums.xilinx.com/t5/Synthesis/Vivado-2019-1-Signed-with-shift-in-condition-synthesis-mistmatch/td-p/982518) | ✓ | 𐄂 | | Mis-synthesis | [Forum 982419](https://forums.xilinx.com/t5/Synthesis/Vivado-2019-1-Bit-selection-synthesis-mismatch/td-p/982419) | ✓ | 𐄂 | +### Icarus Verilog + +| Type | Issue | Confirmed | Fixed | +|----------------|-----------------------------------------------------------------|-----------|-------| +| Mis-simulation | [Issue 283](https://github.com/steveicarus/iverilog/issues/283) | ✓ | 𐄂 | + ## Install the Fuzzer The fuzzer now supports building with [nix](https://nixos.org/nix/manual/), which pulls in all the extra dependencies that are needed to build the project. The main files and their functions are described below: |