diff options
| author | Yann Herklotz <ymherklotz@gmail.com> | 2019-01-20 16:49:17 +0000 |
|---|---|---|
| committer | Yann Herklotz <ymherklotz@gmail.com> | 2019-01-20 16:49:17 +0000 |
| commit | d60fc9c882f6ce668123fbfbfd9a0f02dd832f7b (patch) | |
| tree | 981c9443c8d919b0bc58abbfb8d617223eb99a9f /app | |
| parent | 8cfacbac3bb16fc0294e6eaf7c7b16c238c58d73 (diff) | |
| download | verismith-d60fc9c882f6ce668123fbfbfd9a0f02dd832f7b.tar.gz verismith-d60fc9c882f6ce668123fbfbfd9a0f02dd832f7b.zip | |
Prettify files
Diffstat (limited to 'app')
| -rw-r--r-- | app/Main.hs | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/app/Main.hs b/app/Main.hs index c13d4c2..aeda625 100644 --- a/app/Main.hs +++ b/app/Main.hs @@ -43,7 +43,10 @@ runEquivalence t = do ^.. getVerilogSrc . traverse . getDescription - shelly . chdir_p (fromText "equiv" </> fromText t) . verbosely $ runEquiv defaultYosys defaultYosys (Just defaultXst) circ + shelly . chdir_p (fromText "equiv" </> fromText t) . verbosely $ runEquiv defaultYosys + defaultYosys + (Just defaultXst) + circ main :: IO () --main = sample (arbitrary :: Gen (Circuit Input)) |