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| author | Yann Herklotz <ymherklotz@gmail.com> | 2018-12-22 14:30:08 +0000 |
|---|---|---|
| committer | Yann Herklotz <ymherklotz@gmail.com> | 2018-12-22 14:30:08 +0000 |
| commit | 8ea1583f4b0f63a5c2b0d46594eac3955297e65c (patch) | |
| tree | 7a75ce091631144b9095bcf0e73353c153ee59da /src/Test/VeriFuzz/Circuit.hs | |
| parent | 7f73caee6374f0da1bc335a6a618ddd7f2249a14 (diff) | |
| download | verismith-8ea1583f4b0f63a5c2b0d46594eac3955297e65c.tar.gz verismith-8ea1583f4b0f63a5c2b0d46594eac3955297e65c.zip | |
[Fix #2] Add generation of AST from Circuit
Diffstat (limited to 'src/Test/VeriFuzz/Circuit.hs')
| -rw-r--r-- | src/Test/VeriFuzz/Circuit.hs | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/Test/VeriFuzz/Circuit.hs b/src/Test/VeriFuzz/Circuit.hs index d934a3d..dc0ec81 100644 --- a/src/Test/VeriFuzz/Circuit.hs +++ b/src/Test/VeriFuzz/Circuit.hs @@ -12,7 +12,7 @@ Definition of the circuit graph. module Test.VeriFuzz.Circuit where -import Data.Graph.Inductive +import Data.Graph.Inductive (Gr, LNode) import System.Random import Test.QuickCheck @@ -25,6 +25,8 @@ data Gate = And -- | Newtype for the Circuit which implements a Graph from fgl. newtype Circuit = Circuit { getCircuit :: Gr Gate () } +newtype CNode = CNode { getCNode :: LNode Gate } + instance Random Gate where randomR (a, b) g = case randomR (fromEnum a, fromEnum b) g of |