diff options
author | Yann Herklotz <ymherklotz@gmail.com> | 2019-01-01 14:48:54 +0100 |
---|---|---|
committer | Yann Herklotz <ymherklotz@gmail.com> | 2019-01-01 14:48:54 +0100 |
commit | fd2963cae60c87aa3bcf382829cb7c44e6e0c2ae (patch) | |
tree | fdb170affd1b7f727ca057587f01850729a36fd8 /src/Test/VeriFuzz/Graph/ASTGen.hs | |
parent | 99d2932e1b4357f4e0aa303a29d08bfd81977a9e (diff) | |
download | verismith-fd2963cae60c87aa3bcf382829cb7c44e6e0c2ae.tar.gz verismith-fd2963cae60c87aa3bcf382829cb7c44e6e0c2ae.zip |
Fix linting warnings
Diffstat (limited to 'src/Test/VeriFuzz/Graph/ASTGen.hs')
-rw-r--r-- | src/Test/VeriFuzz/Graph/ASTGen.hs | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/Test/VeriFuzz/Graph/ASTGen.hs b/src/Test/VeriFuzz/Graph/ASTGen.hs index 2a82592..00ec88b 100644 --- a/src/Test/VeriFuzz/Graph/ASTGen.hs +++ b/src/Test/VeriFuzz/Graph/ASTGen.hs @@ -42,7 +42,7 @@ outputsC c = genPortsAST :: (Circuit -> [Node]) -> Circuit -> [Port] genPortsAST f c = - (port . frNode <$> f c) + port . frNode <$> f c where port = Port Wire 1 @@ -50,7 +50,7 @@ genPortsAST f c = -- assignment expressions. genAssignExpr :: Gate -> [Node] -> Maybe Expr genAssignExpr g [] = Nothing -genAssignExpr g (n:[]) = Just . Id $ frNode n +genAssignExpr g [n] = Just . Id $ frNode n genAssignExpr g (n:ns) = BinOp wire op <$> genAssignExpr g ns where wire = Id $ frNode n |