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authorYann Herklotz <ymherklotz@gmail.com>2019-02-08 15:48:19 +0000
committerYann Herklotz <ymherklotz@gmail.com>2019-02-08 15:48:19 +0000
commitf6b7e771fd8e7bb89a3981886c93603363dd9ed2 (patch)
treea9022646668a243324386b76911c3bc3c8d981c9 /src/VeriFuzz/Reduce.hs
parente58c77ee12be243d487b1dccbee9c457dbbe0a20 (diff)
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Add Reduce which will contain the test reduction
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diff --git a/src/VeriFuzz/Reduce.hs b/src/VeriFuzz/Reduce.hs
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+{-|
+Module : VeriFuzz.Reduce
+Description : Test case reducer implementation.
+Copyright : (c) 2019, Yann Herklotz Grave
+License : GPL-3
+Maintainer : ymherklotz [at] gmail [dot] com
+Stability : experimental
+Portability : POSIX
+
+Test case reducer implementation.
+-}
+
+module VeriFuzz.Reduce where
+
+import Control.Lens
+import VeriFuzz.AST
+import VeriFuzz.Mutate
+
+halve :: [a] -> ([a], [a])
+halve l = splitAt (length l `div` 2) l
+
+removeUninitWires :: [ModItem] -> [ModItem]
+removeUninitWires ms = transformOf traverseModItem trans <$> ms
+ where
+ ids = ms ^.. traverse . modContAssign . contAssignNetLVal
+
+halveModDecl :: ModDecl -> (ModDecl, ModDecl)
+halveModDecl m =
+ (m & modItems %~ fst . halve, m & modItems %~ snd . halve)