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| author | Yann Herklotz <ymherklotz@gmail.com> | 2019-01-22 19:01:44 +0000 |
|---|---|---|
| committer | Yann Herklotz <ymherklotz@gmail.com> | 2019-01-22 19:01:44 +0000 |
| commit | 0636119cb5faf8e55a4a17bb00d15d6710679c35 (patch) | |
| tree | 7524e2a67a514eefcab588ac09f3c2c527c7efee /src/VeriFuzz/Simulator/Xst.hs | |
| parent | 125388a9fa696e354961545887f07633f06b3107 (diff) | |
| download | verismith-0636119cb5faf8e55a4a17bb00d15d6710679c35.tar.gz verismith-0636119cb5faf8e55a4a17bb00d15d6710679c35.zip | |
Better multithreading
Diffstat (limited to 'src/VeriFuzz/Simulator/Xst.hs')
| -rw-r--r-- | src/VeriFuzz/Simulator/Xst.hs | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/VeriFuzz/Simulator/Xst.hs b/src/VeriFuzz/Simulator/Xst.hs index 415a45e..03c1707 100644 --- a/src/VeriFuzz/Simulator/Xst.hs +++ b/src/VeriFuzz/Simulator/Xst.hs @@ -42,10 +42,10 @@ runSynthXst sim m outf = do writefile xstFile $ xstSynthConfig m writefile prjFile [st|verilog work "rtl.v"|] writefile "rtl.v" $ genSource m - timeout_ (xstPath sim) ["-ifn", toTextIgnore xstFile] - run_ (netgenPath sim) - ["-w", "-ofmt", "verilog", toTextIgnore $ modFile <.> "ngc", toTextIgnore outf] - run_ "sed" ["-i", "/^`ifndef/,/^`endif/ d; s/ *Timestamp: .*//;", toTextIgnore outf] + noPrint $ timeout_ (xstPath sim) ["-ifn", toTextIgnore xstFile] + noPrint $ run_ (netgenPath sim) + ["-w", "-ofmt", "verilog", toTextIgnore $ modFile <.> "ngc", toTextIgnore outf] + noPrint $ run_ "sed" ["-i", "/^`ifndef/,/^`endif/ d; s/ *Timestamp: .*//;", toTextIgnore outf] where modFile = fromText $ modName m xstFile = modFile <.> "xst" |