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authorYann Herklotz <git@ymhg.org>2019-04-08 21:24:39 +0100
committerYann Herklotz <git@ymhg.org>2019-04-08 21:24:39 +0100
commit7653f8fd33162b8b166a12e125c988663ec2fe79 (patch)
tree46c0e848e9d4e2a1b6ae08f26f9854d11fea9de0 /src/VeriFuzz/Verilog/Gen.hs
parent4b5401ef3400413be0559dfa17718611822fc4c6 (diff)
downloadverismith-7653f8fd33162b8b166a12e125c988663ec2fe79.tar.gz
verismith-7653f8fd33162b8b166a12e125c988663ec2fe79.zip
Create Arbitrary module
Diffstat (limited to 'src/VeriFuzz/Verilog/Gen.hs')
-rw-r--r--src/VeriFuzz/Verilog/Gen.hs1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/VeriFuzz/Verilog/Gen.hs b/src/VeriFuzz/Verilog/Gen.hs
index 87a0a31..3afdd1a 100644
--- a/src/VeriFuzz/Verilog/Gen.hs
+++ b/src/VeriFuzz/Verilog/Gen.hs
@@ -30,6 +30,7 @@ import Hedgehog (Gen)
import qualified Hedgehog.Gen as Hog
import VeriFuzz.Config
import VeriFuzz.Internal
+import VeriFuzz.Verilog.Arbitrary
import VeriFuzz.Verilog.AST
import VeriFuzz.Verilog.Internal
import VeriFuzz.Verilog.Mutate