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| author | Yann Herklotz <ymherklotz@gmail.com> | 2019-01-19 19:35:30 +0000 |
|---|---|---|
| committer | Yann Herklotz <ymherklotz@gmail.com> | 2019-01-19 19:35:30 +0000 |
| commit | 75e6abdcb78c70b7449e5fd7f48d8a3e6b3d164b (patch) | |
| tree | f66bf170f9340c86797a623394e63d07ffe66ee8 /src/VeriFuzz/Verilog/Helpers.hs | |
| parent | 4ba440d842e9a0502b429fbc04e2be41c8037a4c (diff) | |
| download | verismith-75e6abdcb78c70b7449e5fd7f48d8a3e6b3d164b.tar.gz verismith-75e6abdcb78c70b7449e5fd7f48d8a3e6b3d164b.zip | |
Set column to 100
Diffstat (limited to 'src/VeriFuzz/Verilog/Helpers.hs')
| -rw-r--r-- | src/VeriFuzz/Verilog/Helpers.hs | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/VeriFuzz/Verilog/Helpers.hs b/src/VeriFuzz/Verilog/Helpers.hs index 53d219b..f910924 100644 --- a/src/VeriFuzz/Verilog/Helpers.hs +++ b/src/VeriFuzz/Verilog/Helpers.hs @@ -45,9 +45,7 @@ testBench = ModDecl [ regDecl "a" , regDecl "b" , wireDecl "c" - , ModInst "and" - "and_gate" - [ModConn $ Id "c", ModConn $ Id "a", ModConn $ Id "b"] + , ModInst "and" "and_gate" [ModConn $ Id "c", ModConn $ Id "a", ModConn $ Id "b"] , Initial $ SeqBlock [ BlockAssign . Assign (RegId "a") Nothing $ Number 1 1 , BlockAssign . Assign (RegId "b") Nothing $ Number 1 1 |