diff options
| author | Yann Herklotz <git@yannherklotz.com> | 2019-06-05 12:06:49 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2019-06-05 12:06:49 +0100 |
| commit | c40faa081ae7f31cb1b6125d1c5c3bdf650f3f63 (patch) | |
| tree | 3e3bb7026ba268eed2f842d702195b0472c905d2 /src/VeriFuzz/Verilog/Mutate.hs | |
| parent | e4737c37c9dc358d56dbb7a97d68de2c93053c0c (diff) | |
| download | verismith-c40faa081ae7f31cb1b6125d1c5c3bdf650f3f63.tar.gz verismith-c40faa081ae7f31cb1b6125d1c5c3bdf650f3f63.zip | |
Add combination option
Diffstat (limited to 'src/VeriFuzz/Verilog/Mutate.hs')
| -rw-r--r-- | src/VeriFuzz/Verilog/Mutate.hs | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/VeriFuzz/Verilog/Mutate.hs b/src/VeriFuzz/Verilog/Mutate.hs index 8af0182..7496935 100644 --- a/src/VeriFuzz/Verilog/Mutate.hs +++ b/src/VeriFuzz/Verilog/Mutate.hs @@ -380,11 +380,11 @@ combineAssigns p a = a <> [ModCA . ContAssign (p ^. portName) . UnOp UnXor . fold $ Id <$> assigns] where assigns = a ^.. traverse . modContAssign . contAssignNetLVal -combineAssigns_ :: Port -> [Port] -> ModItem -combineAssigns_ p ps = +combineAssigns_ :: Bool -> Port -> [Port] -> ModItem +combineAssigns_ comb p ps = ModCA . ContAssign (p ^. portName) - . UnOp UnXor + . (if comb then UnOp UnXor else id) . fold $ Id <$> ps |