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-rw-r--r--src/VeriFuzz/CodeGen.hs2
-rw-r--r--src/VeriFuzz/Parser.hs2
-rw-r--r--test/Property.hs28
3 files changed, 18 insertions, 14 deletions
diff --git a/src/VeriFuzz/CodeGen.hs b/src/VeriFuzz/CodeGen.hs
index 3e36cf5..99b52f6 100644
--- a/src/VeriFuzz/CodeGen.hs
+++ b/src/VeriFuzz/CodeGen.hs
@@ -118,7 +118,7 @@ genFunc UnSignedFunc = "$unsigned"
genExpr :: Expr -> Text
genExpr (BinOp eRhs bin eLhs) = "(" <> genExpr eRhs <> genBinaryOperator bin <> genExpr eLhs <> ")"
genExpr (Number s n ) = "(" <> minus <> showT s <> "'h" <> T.pack (showHex (abs n) "") <> ")"
- where minus | signum n > 0 = "" | otherwise = "-"
+ where minus | signum n >= 0 = "" | otherwise = "-"
genExpr (Id i ) = i ^. getIdentifier
genExpr (Concat c ) = "{" <> comma (genExpr <$> c) <> "}"
genExpr (UnOp u e ) = "(" <> genUnaryOperator u <> genExpr e <> ")"
diff --git a/src/VeriFuzz/Parser.hs b/src/VeriFuzz/Parser.hs
index 48dafe2..b4831d1 100644
--- a/src/VeriFuzz/Parser.hs
+++ b/src/VeriFuzz/Parser.hs
@@ -205,7 +205,7 @@ parseModDecl = do
_ <- symbol ";"
modItem <- lexeme $ option [] . try $ many1 parseModItem
_ <- reserved "endmodule"
- return $ ModDecl name [defaultPort "y"] modL modItem
+ return $ ModDecl name [] modL modItem
parseDescription :: Parser Description
parseDescription = Description <$> lexeme parseModDecl
diff --git a/test/Property.hs b/test/Property.hs
index 8aa2ec3..0d1b154 100644
--- a/test/Property.hs
+++ b/test/Property.hs
@@ -3,10 +3,11 @@ module Property
)
where
-import Data.Either (isRight)
+import Data.Either (fromRight, isRight)
import qualified Data.Graph.Inductive as G
import Data.Graph.Inductive.PatriciaTree (Gr)
import Test.Tasty
+import Test.Tasty.QuickCheck ((===))
import qualified Test.Tasty.QuickCheck as QC
import Text.Parsec
import VeriFuzz
@@ -24,7 +25,7 @@ instance Show ModDeclSub where
show = show . GenVerilog . getModDecl
instance QC.Arbitrary ModDeclSub where
- arbitrary = ModDeclSub <$> randomMod 3 10
+ arbitrary = ModDeclSub <$> QC.resize 20 (randomMod 3 10)
instance QC.Arbitrary TestGraph where
arbitrary = TestGraph <$> QC.resize 30 randomDAG
@@ -46,20 +47,23 @@ parserInput' (ModDeclSub v) =
where
str = show . GenVerilog $ v
---parserIdempotent' :: (GenVerilog VerilogSrc) -> Bool
---parserIdempotent' v =
--- p sv == (p . p) sv
--- where
--- sv = show v
--- p = show . fromRight (VerilogSrc []) . parse parseVerilogSrc "idempotent_test.v"
+parserIdempotent' :: ModDeclSub -> QC.Property
+parserIdempotent' (ModDeclSub v) =
+ p sv === (p . p) sv
+ where
+ vshow = show . GenVerilog
+ sv = vshow v
+ p = vshow . fromRight (error "Failed idempotent test")
+ . parse parseModDecl "idempotent_test.v"
parserInput :: TestTree
parserInput = QC.testProperty "parser input" $
parserInput'
---parserIdempotent :: TestTree
---parserIdempotent = QC.testProperty "parser idempotence" $
--- parserIdempotent'
+parserIdempotent :: TestTree
+parserIdempotent = QC.testProperty "parser idempotence" $
+ parserIdempotent'
propertyTests :: TestTree
-propertyTests = testGroup "Property Tests" [simpleGraph, simpleAltGraph, parserInput]
+propertyTests = testGroup "Property Tests" [simpleGraph, simpleAltGraph
+ , parserInput, parserIdempotent]