diff options
| -rw-r--r-- | src/Verismith/Tool/Template.hs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/Verismith/Tool/Template.hs b/src/Verismith/Tool/Template.hs index 3bd5a2d..0b63e91 100644 --- a/src/Verismith/Tool/Template.hs +++ b/src/Verismith/Tool/Template.hs @@ -140,7 +140,7 @@ sbyConfig :: (Synthesiser a, Synthesiser b) => FilePath -> a -> b -> SourceInfo sbyConfig datadir sim1 sim2 (SourceInfo top _) = [st|[options] multiclock on mode prove -aigsmt z3 +aigsmt none [engines] abc pdr |