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| -rw-r--r-- | LICENSE | 4 | ||||
| -rw-r--r-- | src/Verismith/EMI.hs | 11 |
2 files changed, 13 insertions, 2 deletions
@@ -632,7 +632,7 @@ state the exclusion of warranty; and each file should have at least the "copyright" line and a pointer to where the full notice is found. Verismith: Verilog hardware synthesis tool fuzzer - Copyright (C) 2019-2020 Yann Herklotz <yann@yannherklotz.com> + Copyright (C) 2018-2021 Yann Herklotz <yann@yannherklotz.com> This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -652,7 +652,7 @@ Also add information on how to contact you by electronic and paper mail. If the program does terminal interaction, make it output a short notice like this when it starts in an interactive mode: - Verismith Copyright (C) 2019-2020 Yann Herklotz <yann@yannherklotz.com> + Verismith Copyright (C) 2018-2021 Yann Herklotz <yann@yannherklotz.com> This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. This is free software, and you are welcome to redistribute it under certain conditions; type `show c' for details. diff --git a/src/Verismith/EMI.hs b/src/Verismith/EMI.hs new file mode 100644 index 0000000..937a037 --- /dev/null +++ b/src/Verismith/EMI.hs @@ -0,0 +1,11 @@ +-- | +-- Module : Verismith.EMI +-- Description : Definition of the circuit graph. +-- Copyright : (c) 2021, Yann Herklotz +-- License : GPL-3 +-- Maintainer : yann [at] yannherklotz [dot] com +-- Stability : experimental +-- Portability : POSIX +-- +-- Equivalence modulo inputs (EMI) testing. This file should get an existing design, and spit out a +-- modified design that is equivalent under some specific values of the extra inputs. |