diff options
| -rw-r--r-- | src/Test/VeriFuzz/Verilog/AST.hs | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/Test/VeriFuzz/Verilog/AST.hs b/src/Test/VeriFuzz/Verilog/AST.hs index 4f2c52d..184390e 100644 --- a/src/Test/VeriFuzz/Verilog/AST.hs +++ b/src/Test/VeriFuzz/Verilog/AST.hs @@ -213,16 +213,16 @@ data ContAssign = ContAssign { _contAssignNetLVal :: Identifier data Stmnt = TimeCtrl { _statDelay :: Delay , _statDStat :: Maybe Stmnt } -- ^ Time control (@#NUM@) - | EventCtrl { _statEvent :: Event - , _statEStat :: Maybe Stmnt - } - | SeqBlock { _statements :: [Stmnt] } -- ^ Sequential block (@begin ... end@) - | BlockAssign Assign -- ^ blocking assignment (@=@) - | NonBlockAssign Assign -- ^ Non blocking assignment (@<=@) - | StatCA ContAssign -- ^ Stmnt continuous assignment. May not be correct. - | TaskEnable Task - | SysTaskEnable Task - deriving (Eq) + | EventCtrl { _statEvent :: Event + , _statEStat :: Maybe Stmnt + } + | SeqBlock { _statements :: [Stmnt] } -- ^ Sequential block (@begin ... end@) + | BlockAssign Assign -- ^ blocking assignment (@=@) + | NonBlockAssign Assign -- ^ Non blocking assignment (@<=@) + | StatCA ContAssign -- ^ Stmnt continuous assignment. May not be correct. + | TaskEnable Task + | SysTaskEnable Task + deriving (Eq) instance Semigroup Stmnt where (SeqBlock a) <> (SeqBlock b) = SeqBlock $ a <> b |