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-rw-r--r--src/Verismith/Verilog.hs2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/Verismith/Verilog.hs b/src/Verismith/Verilog.hs
index 1e35e37..f3d9e85 100644
--- a/src/Verismith/Verilog.hs
+++ b/src/Verismith/Verilog.hs
@@ -2,7 +2,7 @@
Module : Verismith.Verilog
Description : Verilog implementation with random generation and mutations.
Copyright : (c) 2019, Yann Herklotz Grave
-License : GPLv3
+License : GPL-3
Maintainer : yann [at] yannherklotz [dot] com
Stability : experimental
Portability : POSIX